Analog-to-digital conversion circuit and method

An analog-to-digital conversion circuit, comprising a first capacitor array, a logic circuit and a comparator;

• wherein:
• at a sampling stage, the first capacitor array is configured to connect lower electrode plates of N capacitors in the first capacitor array to a first input voltage, connect lower electrode plates of the other capacitors in the first capacitor array to a common-mode voltage, and connect upper electrode plates of all capacitors in the first capacitor array to the common-mode voltage to sample the first input voltage, wherein N is a positive integer less than a total number of the capacitors in the first capacitor array;
• in an ith conversion at a conversion stage, the logic circuit is configured to control, according to an ith stored flag bit, the lower electrode plate of an ith capacitor in the first capacitor array to connect to a reference voltage or a ground voltage, such that a first comparison voltage output by the first capacitor array approximates a second comparison voltage, wherein i is a positive integer less than the total number of the capacitors in the first capacitor array;
• and
• the comparator is configured to store a comparison result between the first comparison voltage and the second comparison voltage to an i+1th flag bit in the logic circuit, and analog-to-digital conversion is completed when i+1 is equal to the total number of the capacitors in the first capacitor array.