Switching circuit capable of reducing parasitic capacitance variation

A switching circuit (100), comprising:

• a main switch array (110) comprising multiple main switch elements (114, 115, 116) respectively arranged on multiple main signal paths (111, 112, 113) configured in a parallel connection, wherein the multiple main signal paths (111, 112, 113) are coupled with a first circuit node (101);
• a main switch control circuit (130) arranged to operably control switching operations of the multiple main switch elements (114, 115, 116);
• an auxiliary switch array (140) comprising multiple auxiliary switch elements (144, 145, 146) respectively arranged on multiple auxiliary signal paths (141, 142, 143) configured in a parallel connection, wherein the multiple auxiliary signal paths (141, 142, 143) are coupled with the first circuit node (101);
• an auxiliary switch control circuit (150), coupled with the main switch control circuit (130), arranged to operably control switching operations of the multiple auxiliary switch elements (144, 145, 146), so as to maintain a total number of turned-on switch elements in the main switch array (110) and the auxiliary switch array (140) to be equal to or more than a threshold quantity.