US 2019/0058465 A1 · OVERVOLTAGE PROTECTION CIRCUIT

Abstract

Universal Serial Bus (USB) protection circuits are provided. A circuit includes a plurality of first transistors connected in series between a pad and ground. The circuit also includes a plurality of second transistors connected in series between the pad and a supply voltage. The circuit further includes a control circuit that applies respective bias voltages to each one of the plurality of first transistors and to each one of the plurality of second transistors. The bias voltages are configured to: turn off the plurality of first transistors and turn off the plurality of second transistors when a pad voltage of the pad is within a nominal voltage range; sequentially turn on the plurality of first transistors when the pad voltage increases above the nominal voltage range; and sequentially turn on the plurality of second transistors when the pad voltage decreases below the nominal voltage range.

Claims20

Dependent claims

A method of manufacturing a circuit, comprising:

forming a first PFET and a second PFET connected in series between a pad having a pad voltage and ground;
forming a first NFET and a second NFET connected in series between the pad and a supply voltage;
forming a third PFET, wherein a source of the third PFET is connected to a gate of the first PFET, and the pad voltage is applied to a gate of the third PFET;
forming a third NFET, wherein a source of the third NFET is connected to a gate of the first NFET, and the pad voltage is applied to a gate of the third NFET;
forming a first voltage divider connected to the gate of the first PFET;
and
forming a second voltage divider connected to the gate of the first NFET.

4 more elements

Dependencies are inferred from the claim text.

Overvoltage protection circuit

Life of this patent

Overvoltage protection circuit

Life of this patent

Abstract

Claims20