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US 2019/0058392 A1Published application
High frequency wireless power rectifier startup circuit design
AssigneeIntegrated Device Technology, Inc.
InventorsLijie ZHAO, Yue WANG, Stephen ULBRICH
Life of this patent
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Abstract
A rectifier circuit can include a plurality of FETs arranged as a rectifier; and a start-up circuit applied to each of the plurality of FETs that turn each of the FETs off during a circuit startup period, wherein the start-up circuit provides a large impedance for low power dissipation during normal operation of the rectifier.
Claims19
A rectifier, comprising:
- a first transistor and a second transistor coupled in series between a rectifier output and a ground, wherein a first AC input is coupled to a first node between the first transistor and the second transistor;
- a third transistor and a fourth transistor coupled in series between the rectifier output and the ground, wherein a second AC input is coupled to a second node between the third transistor and the fourth transistor;
- a first control circuit coupled between a gate of the first transistor and a gate of the fourth transistor to control operation of the first and the fourth transistor;
- and
- a first startup circuit coupled between the gate of the first transistor and the first node, the first startup circuit controlling the gate of the first transistor in a startup time period prior to an operating period of the rectifier, wherein the first startup circuit provides a low impedance between the gate of the first transistor and the first node during a startup time and a high impedance between the gate of the first transistor and the first node during the operating period of the rectifier.
2 more elements
A startup circuit for a rectifier, comprising:
- a first control transistor coupled between a gate of a rectifier transistor and a first node;
- a resistive element coupled to a gate of the first control transistor;
- and
- a second control transistor coupled between the gate of the first control transistor and the first node, a gate of the second control transistor coupled to a control circuit of the rectifier,
- wherein the first control transistor is turned on by the resistive element during a startup time period to provide a low impedance path between the gate of the rectifier transistor and the first node and turned off by the second control transistor to provide a high impedance between the gate of the rectifier transistor and the first node during an operating period.
2 more elements
A rectifier circuit, comprising:
- a plurality of FETs arranged as a rectifier;
- and
- a start-up circuit applied to each of the plurality of FETs that turn each of the FETs off during a circuit startup period,
- wherein the start-up circuit provides a large impedance for low power dissipation during normal operation of the rectifier.
1 more element
Dependencies are inferred from the claim text.