Back to results
US 2019/0058165 A1Published application
Manufacturing method of thin film transistor array substrate
AssigneeShenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
InventorHongyuan XU
Life of this patent
Estimating the term…
Abstract
A manufacturing method of a thin film transistor array substrate is provided in the present disclosure. A third mask of the present disclosure is configured to perform a hydrophobic treatment on a surface of a photoresist to form a hydrophobic group. Presence of the hydrophobic group makes a solution type transparent metal and an OLED material not covered on the surface of the photoresist, thereby facilitating photoresist stripping, and promoting stripping efficiency and process efficiency. Existence of the photoresist makes the OLED material form a fixed pattern. One of the masks can be saved to lower product costs.
Claims18
A manufacturing method of a thin film transistor array substrate, comprising:
- a step S110 of using a first mask to form a gate electrode and a gate line of a thin film transistor on a surface of a substrate;
- a step S120 of using a second mask to form an insulating layer of the gate electrode, an active layer, a source electrode, a drain electrode, and a passivation layer of the thin film transistor on the surface of the substrate;
- a step S130 of coating a first photoresist layer on the passivation layer, wherein the first photoresist layer is exposed through a gray mask plate or a translucent mask plate to pattern the first photoresist layer to form a first photoresist region and a second photoresist region separate from each other;
- a step S140 of removing portions of the passivation layer uncovered by the first photoresist region and the second photoresist region by an etching process to form a passivation layer via hole to expose the drain electrode;
- a step S150 of performing an ashing treatment on the first photoresist region and the second photoresist region to leave a part of the first photoresist region and a part of the second photoresist region;
- wherein the second photoresist region comprises a first photoresist sub-region and a second photoresist sub-region connected with each other, and a thickness of the first photoresist sub-region is less than a thickness of the second photoresist sub-region;
- and
- wherein the step S150 of performing the ashing treatment on the first photoresist region and the second photoresist region comprises:
- removing the first photoresist sub-region of the second photoresist region and reducing the thickness of the second photoresist sub-region to form the part of the second photoresist region;
- and reducing the thickness of the first photoresist region to form the part of the first photoresist region;
- a step S160 of performing a hydrophobic treatment on a surface of the part of the first photoresist region and a surface of the part of the second photoresist region;
- a step S170 of coating a solution type transparent metal on the passivation layer uncovered by the part of the first photoresist region and the part of the second photoresist region to perform a curing treatment to form a pixel electrode connecting to the drain electrode;
- and
- a step S180 of performing a stripping treatment on the part of the first photoresist region and the part of the second photoresist region.
11 more elements
A manufacturing method of a thin film transistor array substrate, comprising:
- a step S310 of using a first mask to form a gate electrode and a gate line of a thin film transistor on a surface of a substrate;
- a step S320 of using a second mask to form an insulating layer of the gate electrode, an active layer, a source electrode, a drain electrode, and a passivation layer of the thin film transistor on the surface of the substrate;
- a step S330 of coating a first photoresist layer on the passivation layer, wherein the first photoresist layer is exposed through a gray mask plate or a translucent mask plate to pattern the first photoresist layer to form a first photoresist region and a second photoresist region separate from each other;
- a step S340 of removing portions of the passivation layer uncovered by the first photoresist region and the second photoresist region by an etching process to form a passivation layer via hole to expose the drain electrode;
- a step S350 of performing an ashing treatment on the first photoresist region and the second photoresist region to leave a part of the first photoresist region and a part of the second photoresist region;
- a step S360 of performing a hydrophobic treatment on a surface of the part of the first photoresist region and a surface of the part of the second photoresist region;
- a step S370 of coating a solution type transparent metal on the passivation layer uncovered by the part of the first photoresist region and the part of the second photoresist region to perform a curing treatment to form a pixel electrode connecting to the drain electrode;
- and
- a step S380 of performing a stripping treatment on the part of the first photoresist region and the part of the second photoresist region.
6 more elements
Dependencies are inferred from the claim text.