Gallium nitride voltage regulator

A method for forming a gallium nitride complementary metal-oxide-semiconductor device, the method comprising:

• forming a first oxide island and a second oxide island on a silicon substrate, the first and second oxide islands separated by a trench;
• forming a first gallium nitride layer in the trench and on a portion of the first and second oxide islands;
• forming a polarization layer on a top side of the first gallium nitride layer and on a first and second side wall of the first gallium nitride layer;
• forming a second gallium nitride layer on the first oxide island and on a first sidewall of the polarization layer;
• forming a doped gallium nitride layer on the second gallium nitride layer.

A computing device comprising:

• a processor mounted on a substrate;
• a communications logic unit within the processor;
• a memory within the processor;
• a graphics processing unit within the computing device;
• an antenna within the computing device;
• a display on the computing device;
• a battery within the computing device;
• a power amplifier within the processor;
• and
• a voltage regulator within the processor;
• wherein the computing device comprises:
• a voltage regulator circuit, the voltage regulator circuit comprising:
• controller circuitry;
• driver circuitry;
• and
• power train circuitry;
• wherein the voltage regulator circuit comprises a gallium nitride transistor, the gallium nitride transistor comprising:
• a silicon substrate;
• a first oxide layer and a second oxide layer on the substrate;
• a first gallium nitride layer on the silicon substrate and the first oxide layer and on the second oxide layer;
• a polarization layer on the first gallium nitride layer;
• a second gallium nitride layer on the first oxide layer on the substrate and adjacent a first sidewall of the polarization layer;
• a first p-doped gallium nitride layer on the second gallium nitride layer;
• a third gallium nitride layer on the second oxide layer on the substrate and adjacent a second sidewall of the polarization layer;
• and
• a second p-doped gallium nitride layer on the third gallium nitride layer.