Semiconductor structure and design method of dummy pattern layout
AssigneeUnited Microelectronics Corp.
InventorsJui-Fa Lu, Chien-Nan Lin, Ching-Hua Yeh
Life of this patent
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Abstract
A semiconductor structure including a substrate, dummy conductive structures, and resistor elements is provided. The substrate includes a resistor region and has isolation structures and dummy support patterns located in the resistor region. Each of the isolation structures is located between two adjacent dummy support patterns. Each of the dummy conductive structures is disposed on each of the isolation structures and equidistant from the dummy support patterns on both sides. The resistor elements are disposed above the dummy conductive structures and aligned with the dummy conductive structures.
Claims20
A semiconductor structure, comprising:
- a substrate comprising a resistor region and having isolation structures and dummy support patterns located in the resistor region, wherein each of the isolation structures is located between two adjacent dummy support patterns;
- dummy conductive structures, wherein each of the dummy conductive structures is disposed on each of the isolation structures and equidistant from the dummy support patterns on both sides;
- and
- resistor elements disposed above the dummy conductive structures and aligned with the dummy conductive structures.
A design method of a dummy pattern layout, comprising:
- obtaining an integrated circuit layout design comprising resistor elements via a computer;
- configuring locations of dummy conductive structures, wherein the dummy conductive structures are aligned with the resistor elements;
- and
- configuring locations of dummy support patterns, wherein each of the dummy support patterns is configured between two adjacent dummy conductive structures, and each of the dummy conductive structures is equidistant from the dummy support patterns on both sides.
Dependencies are inferred from the claim text.