Antifuse device and method of operating the same
AssigneesUnited Microelectronics Corp., Fujian Jinhua Integrated Circuit Co., Ltd.
InventorsTsai-Yu Huang, Pin-Yao Wang
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Abstract
An antifuse device is disclosed. The antifuse device includes a plurality of active regions, a plurality of word lines extending along a first direction and cut through the active regions, a plurality of bit lines and a plurality of source lines extending along a second direction and stride across the active regions. The bit lines and the source lines are arranged alternatively along the first direction. Plural antifuse capacitors are disposed along the source lines and connected between the source lines and the active regions.
Claims20
An antifuse device, comprising:
- a substrate having a plurality of active regions;
- a plurality of word lines formed in the substrate and extending along a first direction, each of the active regions being cut by two adjacent word lines and divided into a first doped region and two second doped regions;
- a plurality of bit lines formed on the substrate and extending along a second direction, the first doped region of each of the active regions being connected to one of the bit lines through a bit line contact structure disposed on the first doped region;
- a plurality of source lines formed on the substrate and extending along the second direction, the second doped regions of the active regions being respectively connected to one of the source lines through a source line contact structure disposed on each of the second doped regions;
- and
- a plurality of capacitors arranged along the second direction and respectively sandwiched between the source line contact structure and one of the bitlines.
A method of operating an antifuse device, comprising:
- providing an antifuse device, comprising:
- a plurality of word lines;
- a plurality of bit lines;
- a plurality of source lines alternately arranged with the bit lines;
- and
- a plurality of antifuse cells respectively comprising a gate and a capacitor, the gate having a turn-on voltage and being controlled by one of the word lines and connected between one of the bit lines and the capacitor, the capacitor having a breakdown voltage and being connected between the gate and one of the source lines, wherein a pair of the antifuse cells having the gates both controlled by an m-word line are respectively connected between an n-source line and an n-bit line and between the n-source line and an (n+1)-bit line, the n-source line being between the n-bit line and the (n+1)-bit line;
- and
- providing a word line control signal to the m-word line, a source line control signal to the n-source line, a first bit line control signal to the n-bit line and a second bit line control signal to the (n+1)-bit line to program or read from the pair of the antifuse cells.
Dependencies are inferred from the claim text.