Reducing Hot Electron Injection Type Of Read Disturb In 3D Memory Device Having Connected Source-End Select Gates

A method, comprising:

• throughout a time period;
• increasing a voltage of unselected word lines among a plurality of word lines from an initial level to a read pass level, wherein the plurality of word lines are connected to memory cells in NAND strings in a block, and each NAND string comprises a source-end select gate transistor and a drain-end select gate transistor, providing the source-end select gate transistors of the block in a conductive state, and providing the drain-end select gate transistors of a selected subset of the NAND strings in a non-conductive state;
• during one interval of the time period, providing the drain end select gate transistors of an unselected subset of the NAND strings in a conductive state;
• during another interval of the time period, providing the drain end select gate transistor of the unselected subset of the NAND strings in a non-conductive state;
• and
• after the time period, providing a control gate read voltage on a selected word line among the plurality of word lines while providing the drain-end select gate transistors of the unselected subset in the non-conductive state and sensing memory cells connected to the selected word line in the selected subset of the NAND strings, wherein the one interval is greater when the selected word line is at a midpoint half way between the source-end select gate transistors and the drain-end select gate transistors than when the selected word line is between the midpoint and the drain-end select gate transistor.

An apparatus, comprising:

• a plurality of NAND strings in a block, each NAND memory string comprising memory cells between a source-end select gate transistor and a drain-end select gate transistor, the plurality of NAND strings comprise NAND strings in a selected sub-block of the block and NAND strings in an unselected sub-block of the block, and control gates of each of the source-end select gate transistors in the block are connected to one another;
• a plurality of word lines connected to the memory cells, the word lines comprise a selected word line and unselected word lines;
• and
• means for increasing voltages of the unselected word lines from an initial level to a read pass level during a time period;
• means for providing the source-end select gate transistors in the block in a conductive state throughout the increasing of the voltages;
• means for providing the drain-end select gate transistors for the NAND strings in the unselected sub-block in a conductive state during a portion of the time period, when the NAND strings in the unselected sub-block are programmed;
• means for providing the drain-end select gate transistors for the NAND strings in the unselected sub-block in a non-conductive state throughout the time period when the NAND strings in the unselected sub-block are unprogrammed;
• and
• means for sensing currents in the NAND strings in the selected sub-block while the drain-end select gate transistors for the NAND strings in the unselected sub-block are in the non-conductive state, drain-end select gate transistors for the NAND strings in the selected sub-block are in the conductive state and the source-end select gate transistors are in the conductive state.