Semiconductor memory device and operating method thereof
AssigneeSK hynix Inc.
InventorHee Youl LEE
Life of this patent
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Abstract
A semiconductor memory device including a memory cell array including a plurality of memory blocks, a voltage generator applying operation voltages to a selected memory block, among the plurality of memory blocks, a control logic generating converted data by converting data bit sets respectively corresponding to at least one set of program states among a plurality of program states, during a program operation, and a read and write circuit temporarily storing the converted data and performing a program operation by controlling potential levels of bit lines of the memory cell array in accordance with stored converted data.
Claims20
A semiconductor memory device, comprising:
- a memory cell array comprising a plurality of memory cells;
- a peripheral circuit configured to perform a program operation to store converted data in selected memory cells among the plurality of memory cells;
- and
- a control logic configured to generate the converted data from original data by reducing a number of program states for the original data to a lower number of program states for the converted data and configured to control the peripheral circuit to store the converted data in the selected memory cells.
A method of operating a semiconductor memory device comprising a plurality of memory cells, the method comprising:
- receiving original data;
- generating converted data from the original data by reducing a number of program states for the original data to a lower number of program states for the converted data;
- and
- performing a program operation to store the converted data in selected memory cells among the plurality of memory cells.
Dependencies are inferred from the claim text.