Resistive memory storage apparatus and writing method thereof

A resistive memory storage apparatus, comprising:

• a memory cell array, comprising a memory cell;
• and
• a memory controlling circuit, coupled to the memory cell array, and the memory controlling circuit applying a first set voltage on a memory cell, and acquiring a first reading current of the memory cell, the memory controlling circuit applying a first disturbance voltage on the memory cell, and acquiring a second reading current of the memory cell, and the memory controlling circuit determining to apply a second set voltage or a second disturbance voltage on the memory cell according to a magnitude relationship between the first reading current and the second reading current, wherein an absolute value of the first disturbance voltage is smaller than an absolute value of a reset voltage, and an absolute value of the second disturbance voltage is smaller than an absolute value of the second set voltage.