Apparatuses, circuits, and methods for biasing signal lines
AssigneeMicron Technology, Inc.
InventorsMarco-Domenico Tiburzi, Giulio-Giuseppe Marotta
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Abstract
Apparatuses, circuits, and methods are disclosed for biasing signal lines in a memory array. In one such example the memory array includes a signal line coupled to a plurality of memory cells and is configured to provide access to the plurality of memory cells responsive to a biasing condition of the signal line. The memory array also includes a signal line driver coupled to the signal line, the signal line driver configured to provide a biasing signal to the signal line and to provide a preemphasis in the biasing signal responsive to a control signal. The control signal is responsive to an operating condition.
Claims20
An apparatus, comprising:
- a memory array comprising an access line driver coupled to at least one access line of a plurality of access lines;
- and
- a microcontroller configured to calculate a biasing signal, wherein the biasing signal is preemphasized according to a model of the at least one access line as a resistance-capacitance (RC) network.
An apparatus, comprising:
- a memory array comprising an access line;
- and
- a microcontroller configured to provide, to the memory array, a biasing signal that is preemphasized according to a model of the access line as a resistance-capacitance (RC) network.
Dependencies are inferred from the claim text.