US 2019/0057646 A1 · Electronic Devices With Low Refresh Rate Display Pixels

Abstract

A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.

Claims24

Dependent claims

A display pixel, comprising:

a light-emitting diode;
a power supply line;
a data line;
an initialization line;
a first transistor with a drain terminal coupled to the data line and a source terminal;
a second transistor with a source terminal coupled to the source terminal of the first transistor, a drain terminal, and a gate terminal;
a third transistor coupled between the drain and gate terminals of the second transistor;
a fourth transistor coupled between the power supply line and the second transistor;
a fifth transistor coupled between the second transistor and light-emitting diode;
and
a sixth transistor coupled between the initialization line and the light-emitting diode, wherein only the first transistor is switched on during an on-bias stress phase to mitigate threshold voltage hysteresis of the second transistor.

8 more elements

A method of operating a display pixel that includes a light-emitting diode, a power supply line, a data line, an initialization line, a first transistor with a drain terminal coupled to the data line and a source terminal, a second transistor with a source terminal coupled to the source terminal of the first transistor, a drain terminal, and a gate terminal, a third transistor coupled between the drain and gate terminals of the second transistor, a fourth transistor coupled between the power supply line and the second transistor, a fifth transistor coupled between the second transistor and light-emitting diode, and a sixth transistor coupled between the initialization line and the light-emitting diode, the method comprising:

operating the display pixel at an overall refresh rate that is less than 30 Hz;
and
while the display pixel is transitioning from displaying black to displaying white, performing multiple on-bias stress operations to mitigate threshold voltage hysteresis of the second transistor, wherein only the first transistor is switched on during the on-bias stress operations.

Dependencies are inferred from the claim text.

Electronic Devices With Low Refresh Rate Display Pixels

Life of this patent

Electronic Devices With Low Refresh Rate Display Pixels

Life of this patent

Abstract

Claims24