Memory device including neural network processor and memory system including the memory device
AssigneesSK hynix Inc., Seoul National Unversity R&DB Foundation
InventorsSeunghwan CHO, Sungjoo YOO, Youngjae JIN
Life of this patent
Estimating the term…
Abstract
A memory device may include a memory cell circuit; a memory interface circuit configured to receive a read command and a write command from a host and to control the memory cell circuit according to the read command and the write command; and a neural network processor configured to receive a neural network processing command from the host, to perform a neural network processing operation according to the neural network processing command, and to control the memory cell circuit to read or write data while performing the neural network processing operation.
Claims21
A memory device, comprising:
- a memory cell circuit;
- a memory interface circuit configured to receive a read command and a write command from a host, and to control the memory cell circuit according to the read command and the write command;
- and
- a neural network processor configured to receive a neural network processing command from the host, to perform a neural network processing operation according to the neural network processing command, and to control the memory circuit to read or write data while performing the neural network processing operation.
A memory system, comprising:
- a host;
- and
- a memory device configured to perform a read operation according to a read command provided from the host, to perform a write operation according to a write command provided from the host, and to perform a neural network processing operation according to a neural network processing command provided from the host,
- wherein the memory device includes:
- a memory cell circuit;
- a memory interface circuit configured to control the memory cell circuit according to the read command and the write command;
- and
- a neural network processor configured to perform the neural network processing operation according to the neural network processing command, and to control the memory cell circuit to read or write data while performing the neural network processing operation.
Dependencies are inferred from the claim text.