Method and Apparatus for Clock Signal Distribution

A method comprising:

• generating a differential clock signal using a clock source;
• providing the differential clock signal to a current mode logic (CML) driver;
• driving the differential clock signal over a differential signal path to a CIVIL receiver;
• providing the differential clock signal from the CIVIL receiver to a divider;
• and
• distributing a clock signal that is based on the differential clock signal to one or more communications circuits.

A system comprising:

• a communications link coupled between a first integrated circuit (IC) and a second IC, wherein the communications link includes, in the first IC, a first transmitter and a first receiver and further includes a first clock distribution network configured to distribute a first clock signal to the first transmitter and the first receiver, the first clock distribution network comprising:
• a first clock source;
• a first current mode logic (CML) driver coupled to receive a differential clock signal generated by the clock source and configured to transmit the differential clock signal over a differential signal path;
• a first CML receiver coupled to receive the differential clock signal;
• and
• a first divider coupled to receive the differential clock signal from the first CML receiver, wherein the divider is configured to divide a frequency of the differential clock signal to generate the first clock signal as a first reduced frequency clock signal, and further coupled to provide the first clock signal to the first transmitter and the first receiver.