US 2019/0050356 A1 · Virtual Machine Monitor Interrupt Support for Computer Processing Unit (CPU)

Abstract

An interrupt interface of a central processing unit (CPU) comprises a bus with a plurality of interfaces to various components of the CPU. These components can include a memory that includes instructions to execute operations of a processor component, a plurality of virtual machines (VMs) and a virtual machine monitor (VMM)/hypervisor configured to execute the plurality of VMs. The processor can receive interrupt requests (interrupt) as service requests in parallel, which can be executed by the VMM or any one or more of the plurality of VMs to execute VM applications on a dedicated instance of a guest operating system for a task. The processor can further determine whether to grant an interrupt request to the VMM and the VMs based on predetermined criteria, including a current task priority, a pending interrupt priority, or an interrupt enable, associated with the current status of each of the component.

Claims20

Dependent claims

A system, comprising:

a processor component comprising a plurality of virtual machines (VMs) and a virtual machine monitor (VMM)/hypervisor configured to control the plurality of VMs, wherein the processor component is configured to:
receive a plurality of interrupt requests that correspond to one or more of:
the VMM/hypervisor or the plurality of VMs;
and
determine whether to grant an interrupt request of the plurality of interrupt requests to the VMM/hypervisor and the plurality of VMs based on a set of predetermined criteria,
wherein the processor component is further configured to determine current statuses of interrupt priority schemes at the VMM/hypervisor and the plurality of VMs as part of the set of predetermined criteria.

3 more elements

An apparatus, comprising:

a processor comprising a memory that includes instructions to execute operations, a plurality of interfaces and a bus, wherein the bus is configured to communicatively couple the memory and the plurality of interfaces to a plurality of virtual machines (VMs) and a virtual machine monitor (VMM)/hypervisor, and to communicate data related to a plurality of interrupt requests among the plurality of VMs and the VMM/hypervisor to a decision logic component;
wherein the processor is configured to determine whether to grant an interrupt request of the plurality of interrupt requests to or from the VMM/hypervisor and the plurality of VMs based on a set of predetermined criteria, and wherein the plurality of interrupt requests comprises a plurality of winning service requests that result from different interrupt priority schemes at the VMM and the plurality of VMs.

A method comprising:

receiving, via one or more processors, an interrupt the corresponds to at least one of:
a VMM/hypervisor or a plurality of VMs;
generating, via the one or more processors, a determination of whether to grant the interrupt to the VMM/hypervisor and the plurality of VMs based on a set of predetermined criteria;
determining current results of a plurality of interrupt priority schemes performed at the VMM/hypervisor and the plurality of VMs based on information from a central processing unit (CPU) interrupt control registers (ICRs) and previous context and execution information (PCXIs) registers at the VMM/hypervisor and the plurality of virtual machines (VMs);
and
communicating, via a bus communicatively coupled to the one or more processors, the VMM/hypervisor and the plurality of VMs, the interrupt based on the determination.

3 more elements

Dependencies are inferred from the claim text.

Virtual Machine Monitor Interrupt Support for Computer Processing Unit (CPU)

Life of this patent

Virtual Machine Monitor Interrupt Support for Computer Processing Unit (CPU)

Life of this patent

Abstract

Claims20