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US 2019/0013801 A1Published application
Clock signal controller
AssigneeInternational Business Machines Corporation
InventorsOu HE, Yan SH HE, Wei AW ZHAO
Life of this patent
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Abstract
The present invention provides a clock signal controller structure. The invention allows for the large-skew clock signals to be converted into small-skew clock signals. The technical solution of the present invention may be adopted to synchronize two large-skew clock signals.
Claims18
A clock signal controller, comprising:
- a first clock combiner comprising a plurality of transistors;
- and
- a second clock combiner comprising a plurality of transistors, wherein
- a first clock signal input into the first clock combiner is faster than a second clock signal input into the second clock combiner,
- a trailing edge of a first single clock signal outputted by the first clock combiner corresponds to a rising edge of the first clock signal, and its rising edge corresponds to the trailing edge of the second clock signal, and
- a trailing edge of a second single clock signal outputted by the first clock combiner corresponds to the rising edge of the second clock signal, and its rising edge corresponds to the trailing edge of the first clock signal.
3 more elements
Dependencies are inferred from the claim text.