# US 2018/0324381 A1 · Solid-state imaging device and camera system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0324381 A1 - Document ID: US20180324381A1 - Status: Published application - Kind: A1 - Application number: 16/031,291 - Filed: 2018-07-10 - Published: 2018-11-08 - Earliest claimed: 2011-06-03 - Assignees: Sony Corporation - Applicants: Sony Corporation - Inventors: MASAMICHI ITO; TSUYOSHI HARA; YOSHIAKI INADA - Web page: https://patentgrep.com/patent/US20180324381A1 ## CPC - H04N 25/77: Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components - H04N 25/40: Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled - H04N 25/445: by skipping some contiguous pixels within the read portion of the array - H04N 25/46: by combining or binning pixels - H04N 25/616: involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling - H04N 25/76: Addressed sensors, e.g. MOS or CMOS sensors - H04N 25/766: comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power - H04N 25/7795: {Circuitry for generating timing or clock signals} - H04N 25/78: Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION ## Abstract A solid-state imaging device includes a pixel array with unit pixels each having a photoelectric conversion device arranged in a matrix. Column signal lines are wired with respect to one column in the pixel arrangement and pixels are regularly connected to the column signal lines in accordance with rows in which pixels are positioned. A pixel signal reading unit has a column processing unit that reads pixel signals in units of plural pixels from the pixel array and performs column processing to read signals on a column basis, wherein the pixel signal reading unit includes a column input unit which can connect one or plural column signal lines arranged at a corresponding column to an input of one column processing unit through plural capacitors connected in parallel The column input unit has switches which can change a connection state between capacitors and column signal lines corresponding to the column. ## Claims ### Claim 1 (canceled) ### Claim 2 A camera system, comprising: an imaging device; and an optical system configured to form an object image on the imaging device, wherein the imaging device includes: a pixel array circuit, wherein the pixel array circuit includes a first pixel and a second pixel; a first switch coupled to the first pixel via a first column signal line; a first capacitor coupled to the first switch; a second switch coupled to the second pixel via a second column signal line; a second capacitor coupled to the second switch; a third switch coupled to the first pixel and the second capacitor; a fourth switch coupled to the second pixel and the first capacitor; a reference signal generator configured to generate a reference signal; and a comparator configured to compare the reference signal with a first pixel signal transmitted via the first column signal line, wherein a first input terminal of the comparator is coupled to at least one of the first capacitor or the second capacitor, and wherein a second input terminal of the comparator is coupled to the reference signal generator via a third capacitor. ### Claim 3 (depends on 2) The camera system according to claim 2, wherein the first switch, the second switch, the third switch, and the fourth switch are configured to selectively turn on or off based on the first pixel and the second pixel of the pixel array circuit being read. ### Claim 4 (depends on 3) The camera system according to claim 3, wherein based on the first pixel and the second pixel of the pixel array circuit being read, a level of a first switching signal and a level of a second switching signal are synchronized with a level of a horizontal synchronization signal, wherein the first switch and the fourth switch are configured to selectively turn on or off based on the level of the first switching signal, and wherein the second switch and the third switch are configured to selectively turn on or off based on level of the second switching signal. ### Claim 5 (depends on 2) The camera system according to claim 2, wherein the first switch, the second switch, the third switch, and the fourth switch are configured to selectively turn on or off based on the first pixel and the second pixel of the pixel array circuit being read using pixel addition. ### Claim 6 (depends on 5) The camera system according to claim 5, wherein based on the first pixel and the second pixel of the pixel array circuit being read using the pixel addition, a level of a first switching signal is set to high and a level of a second switching signal is set to low, wherein the first switching signal and the second switching signal are synchronized with a horizontal synchronization signal, wherein the first switch and the fourth switch are configured to selectively turn on or off based on the level of the first switching signal, and wherein the second switch and the third switch are configured to selectively turn on or off based on the level of the second switching signal. ### Claim 7 (depends on 2) The camera system according to claim 2, wherein the first switch and the fourth switch are configured to selectively turn on or off based on a first switching signal, and wherein the second switch and the third switch are configured to selectively turn on or off based on a second switching signal. ### Claim 8 (depends on 7) The camera system according to claim 7, wherein the first switch is configured to turn on based on a high level of the first switching signal, and wherein the fourth switch is configured to turn on based on a low level of the first switching signal. ### Claim 9 (depends on 7) The camera system according to claim 7, wherein the second switch is configured to turn on based on a high level of the second switching signal, and wherein the third switch is configured to turn on based on a low level of the second switching signal. ### Claim 10 (depends on 2) The camera system according to claim 2, further comprising: a counter coupled to an output terminal of the comparator, wherein the counter is configured to count a comparison time of the comparator. ### Claim 11 (depends on 2) The camera system according to claim 2, wherein the first column signal line is adjacent to the second column signal line. ### Claim 12 (depends on 2) The camera system according to claim 2, wherein each of the first switch, the second switch, the third switch, and the fourth switch comprises a p-channel transistor and an n-channel transistor. ### Claim 13 (depends on 2) The camera system according to claim 2, wherein the first pixel comprises a first plurality of shared pixels, and wherein the second pixel comprises a second plurality of shared pixels.