# US 2018/0324035 A1 · Identifying performance-degrading hardware components in computer storage systems > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0324035 A1 - Document ID: US20180324035A1 - Status: Published application - Kind: A1 - Application number: 16/030,277 - Filed: 2018-07-09 - Published: 2018-11-08 - Earliest claimed: 2015-06-23 - Assignees: International Business Machines Corporation - Applicants: International Business Machines Corporation - Inventors: Xue Qiang Zhou - Web page: https://patentgrep.com/patent/US20180324035A1 ## CPC - H04L 41/0677: Localisation of faults - H04L 41/069: using logs of notifications; Post-processing of notifications - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract Performance-degrading hardware components in computer storage systems are identified. A timed-out input/output (I/O) operation is detected. Hardware components that include a plurality of types of hardware components involved with the timed-out I/O operation are identified. Involve counts of the hardware components are increased. A plurality of suspicious hardware components are identified based, at least in part, on a hardware hierarchy including one or more types of hardware components. There is at most one suspicious hardware component for each type of hardware component. A performance-degrading hardware component is identified from among the plurality of suspicious hardware components based, at least in part, on the involve counts and the hardware hierarchy. The performance-degrading hardware component is in a layer of the hardware hierarchy that is lower than layers including other suspicious hardware components. ## Claims ### Claim 1 A method comprising: detecting, by one or more computer processors, a timed-out input/output (I/O) operation; identifying, by the one or more computer processors, each hardware component of a plurality of hardware components involved with the timed-out I/O operation, wherein the hardware components include a plurality of types of hardware components comprising a central electronic complex (CEC) hardware component type, a storage bay hardware component type, a host adapter hardware component type, a device adapter hardware component type, and a storage enclosure hardware component type; increasing, by the one or more computer processors, involve counts of each of the identified hardware components; identifying, by one or more computer processors, a plurality of suspicious hardware components based, at least in part, on a hardware hierarchy including one or more of the types of hardware components, wherein: each type of hardware component represents a respective hierarchical level of the hardware hierarchy based, at least in part, on how delays in receipt of instructions are propagated between the plurality of types of hardware components such that: the storage enclosure hardware component type is lower than both the host adapter hardware component type and the device adapter hardware component type in the hardware hierarchy, both the host adapter hardware component type and the device adapter hardware component type are lower than the storage bay hardware component type in the hardware hierarchy, and the storage bay hardware component type is lower than the CEC hardware component type in the hardware hierarchy; each hierarchical level of the hardware hierarchy includes no more than one suspicious hardware component, and a suspicious component is a hardware component having a highest involve count within the respective hierarchical level of the hardware hierarchy; and identifying, by the one or more computer processors, a performance-degrading hardware component from among the plurality of suspicious hardware components based, at least in part, on the involve counts and the hardware hierarchy, wherein the performance-degrading hardware component is in a layer of the hardware hierarchy that is lower than all other layers that include suspicious hardware components. ### Claim 2 (depends on 1) The method of claim 1, further comprising: determining, by the one or more computer processors, that an involve-count exceeds a threshold of a first threshold type and, in response, identifying the plurality of suspicious hardware components. ### Claim 3 (depends on 1) The method of claim 1, wherein a suspicious hardware component is a hardware component that has an involve count that is higher than involve counts of all other hardware components of a same type. ### Claim 4 (depends on 1) The method of claim 1, further comprising: determining, by the one or more computer processors, that no involve counts of hardware components of a same type exceed a threshold of a second threshold type and, in response, identifying no suspicious hardware component from among the hardware components of the same type. ### Claim 5 (depends on 1) The method of claim 1, further comprising: determining, by one or more computer processors, that a difference between involve counts of any two hardware components of a same type does not exceed a threshold of a third threshold type and, in response, identifying no suspicious hardware component from among hardware components of the same type. ### Claim 6 (depends on 1) The method of claim 1, wherein the device adapter hardware component type and the hose adapter hardware component type are coequal in the hardware hierarchy and each represents a respective semi-layer in the hardware hierarchy. ### Claim 7 (depends on 1) The method of claim 1, wherein the hardware components involved with the timed-out I/O operation are identified based, at least in part, on an I/O distribution policy. ### Claim 8 A computer program product comprising: a computer readable storage device and program instructions stored on the computer readable storage device, the program instructions comprising: program instructions to detect a timed-out input/output (I/O) operation; program instructions to identify each hardware component of a plurality of hardware components involved with the timed-out I/O operation, wherein the hardware components include a plurality of types of hardware components comprising a central electronic complex (CEC) hardware component type, a storage bay hardware component type, a host adapter hardware component type, a device adapter hardware component type, and a storage enclosure hardware component type; program instructions to increase involve counts of each of the identified hardware components; program instructions to identify a plurality of suspicious hardware components based, at least in part, on a hardware hierarchy including one or more of the types of hardware components, wherein: each type of hardware component represents a respective hierarchical level of the hardware hierarchy based, at least in part, on how delays in receipt of instructions are propagated between the plurality of types of hardware components such that: the storage enclosure hardware component type is lower than both the host adapter hardware component type and the device adapter hardware component type in the hardware hierarchy, both the host adapter hardware component type and the device adapter hardware component type are lower than the storage bay hardware component type in the hardware hierarchy, and the storage bay hardware component type is lower than the CEC hardware component type in the hardware hierarchy; each hierarchical level of the hardware hierarchy includes no more than one suspicious hardware component; and a suspicious component is a hardware component having a highest involve count within the respective hierarchical level of the hardware hierarchy; and program instruction to identify a performance-degrading hardware component from among the plurality of suspicious hardware components based, at least in part, on the involve counts and the hardware hierarchy, wherein the performance-degrading hardware component is in a layer of the hardware hierarchy that is lower than all other layers that include suspicious hardware components. ### Claim 9 (depends on 8) The computer program product of claim 8, the program instructions further comprising: program instructions to determine that an involve-count exceeds a threshold of a first threshold type and, in response, identify the plurality of suspicious hardware components. ### Claim 10 (depends on 8) The computer program product of claim 8, wherein a suspicious hardware component is a hardware component that has an involve count that is higher than involve counts of all other hardware components of a same type. ### Claim 11 (depends on 8) The computer program product of claim 8, the program instructions further comprising: program instructions to determine that no involve counts of hardware components of a same type exceed a threshold of a second threshold type and, in response, identifying no suspicious hardware component from among the hardware components of the same type. ### Claim 12 (depends on 8) The computer program product of claim 8, the program instructions further comprising: program instruction to determine that a difference between involve counts of any two hardware components of a same type does not exceed a threshold of a third threshold type and, in response, identifying no suspicious hardware component from among hardware components of the same type. ### Claim 13 (depends on 8) The computer program product of claim 8, wherein the device adapter hardware component type and the hose adapter hardware component type are coequal in the hardware hierarchy and each represents a respective semi-layer in the hardware hierarchy. ### Claim 14 (depends on 8) The computer program product of claim 8, wherein the hardware components involved with the timed-out I/O operation are identified based, at least in part, on an I/O distribution policy. ### Claim 15 A computer system comprising: one or more computer processors; one or more computer readable storage devices; program instructions stored on the computer readable storage devices for execution by at least one of the one or more processors, the program instructions comprising: program instructions to detect a timed-out input/output (I/O) operation; program instructions to identify each hardware component of a plurality of hardware components involved with the timed-out I/O operation, wherein the hardware components include a plurality of types of hardware components comprising a central electronic complex (CEC) hardware component type, a storage bay hardware component type, a host adapter hardware component type, a device adapter hardware component type, and a storage enclosure hardware component type; program instructions to increase involve counts of each of the identified hardware components; program instructions to identify a plurality of suspicious hardware components based, at least in part, on a hardware hierarchy including one or more of the types of hardware components, wherein: each type of hardware component represents a respective hierarchical level of the hardware hierarchy based, at least in part, on how delays in receipt of instructions are propagated between the plurality of types of hardware components such that: the storage enclosure hardware component type is lower than both the host adapter hardware component type and the device adapter hardware component type in the hardware hierarchy, both the host adapter hardware component type and the device adapter hardware component type are lower than the storage bay hardware component type in the hardware hierarchy, and the storage bay hardware component type is lower than the CEC hardware component type in the hardware hierarchy; each hierarchical level of the hardware hierarchy includes no more than one suspicious hardware component; and a suspicious component is a hardware component having a highest involve count within the respective hierarchical level of the hardware hierarchy; and program instruction to identify a performance-degrading hardware component from among the plurality of suspicious hardware components based, at least in part, on the involve counts and the hardware hierarchy, wherein the performance-degrading hardware component is in a layer of the hardware hierarchy that is lower than all other layers that include suspicious hardware components. ### Claim 16 (depends on 15) The computer system of claim 15, the program instructions further comprising: program instructions to determine that an involve-count exceeds a threshold of a first threshold type and, in response, identify the plurality of suspicious hardware components. ### Claim 17 (depends on 15) The computer system of claim 15, wherein a suspicious hardware component is a hardware component that has an involve count that is higher than involve counts of all other hardware components of a same type. ### Claim 18 (depends on 15) The computer system of claim 15, the program instructions further comprising: program instructions to determine that no involve counts of hardware components of a same type exceed a threshold of a second threshold type and, in response, identifying no suspicious hardware component from among the hardware components of the same type. ### Claim 19 (depends on 15) The computer system of claim 15, the program instructions further comprising: program instruction to determine that a difference between involve counts of any two hardware components of a same type does not exceed a threshold of a third threshold type and, in response, identifying no suspicious hardware component from among hardware components of the same type. ### Claim 20 (depends on 15) The computer system of claim 15, wherein the device adapter hardware component type and the hose adapter hardware component type are coequal in the hardware hierarchy and each represents a respective semi-layer in the hardware hierarchy.