# US 2018/0323904 A1 · Received signal processor and method for processing received signal

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- Number: US 2018/0323904 A1
- Document ID: US20180323904A1
- Status: Published application
- Kind: A1
- Application number: 15/773,035
- Filed: 2016-11-01
- Published: 2018-11-08
- Earliest claimed: 2015-11-04
- Assignees: NEC Corporation
- Applicants: NEC Corporation
- Inventors: Kohei HOSOKAWA; Toshiharu ITO; Manabu ARIKAWA; Seigo TAKAHASHI; Takashi ISHIKAWA; Yoshimasa ONO
- Web page: https://patentgrep.com/patent/US20180323904A1

## CPC

- H04L 1/0057: {Block codes (H04L1/0061, H04L1/0064 take precedence)}
- H04B 10/118: specially adapted for satellite communication
- H04B 10/61: Coherent receivers
- H04L 27/0014: {Carrier regulation (of chaotic carriers H04L27/001; for multicarrier receivers H04L27/2657)}
- H04L 27/22: Demodulator circuits; Receiver circuits
- H04L 2027/0057: {quadrature phase}
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- H04B: TRANSMISSION

## Abstract

An appropriate synthesized signal cannot be obtained by only correcting relative phase errors of a plurality of received signals; therefore, a received signal processor according to an exemplary aspect of the present invention includes a plurality of signal-to-noise ratio estimation means for estimating respective signal-to-noise ratios of a plurality of digital signal sequences in which relative phase errors of a plurality of received signal sequences having been corrected; a plurality of temporary decision means for performing symbol decisions of the plurality of digital signal sequences and outputting symbol signal sequences; symbol-map-rotation determination means for determining respective phase rotation amounts of the plurality of digital signal sequences from the plurality of symbol signal sequences and the respective signal-to-noise ratios of the plurality of digital signal sequences; and a plurality of phase rotation means for rotating phases of the plurality of digital signal sequences respectively based on the phase rotation amounts.

## Claims

### Claim 1

A received signal processor, comprising:
a plurality of signal-to-noise ratio estimation sections configured to estimate respective signal-to-noise ratios of a plurality of digital signal sequences in which relative phase errors of a plurality of received signal sequences have been corrected;
a plurality of temporary decision sections configured to perform symbol decisions of the plurality of digital signal sequences and output symbol signal sequences;
a symbol-map-rotation determination section configured to determine respective phase rotation amounts of the plurality of digital signal sequences from the plurality of symbol signal sequences and the respective signal-to-noise ratios of the plurality of digital signal sequences; and
a plurality of phase rotation sections configured to rotate phases of the plurality of digital signal sequences respectively based on the phase rotation amounts.

### Claim 2 (depends on 1)

The received signal processor according to claim 1, wherein
the symbol-map-rotation determination section determines the respective phase rotation amounts in order to match, to a phase of a digital signal sequence with the highest signal-to-noise ratio among the plurality of digital signal sequences, phases of the other digital signal sequences.

### Claim 3 (depends on 1)

The received signal processor according to claim 1, wherein
the symbol-map-rotation determination section
determines the phase rotation amount from the plurality of symbol signal sequences and the respective signal-to-noise ratios of the plurality of digital signal sequences, for the symbol signal sequence corresponding to the digital signal sequence with the signal-to-noise ratio not larger than a predetermined threshold, and
determines to set the phase rotation amount at a value already calculated, for a symbol signal sequence corresponding to the digital signal sequence with the signal-to-noise ratio higher than the predetermined threshold.

### Claim 4 (depends on 1)

The received signal processor according to claim 1, further comprising:
a weight calculation section configured to calculate weights each of which is a ratio of the respective signal-to-noise ratio to a maximum value of the signal-to-noise ratio;
a plurality of multiplication sections configured to multiply the weights by second digital signal sequences output from the phase rotation section, respectively;
an addition section configured to calculate a sum of a plurality of weighted digital signals output from the plurality of multiplication sections; and
a decision section configured to perform symbol decision from a signal output from the addition section.

### Claim 5 (depends on 1)

The received signal processor according to claim 1, further comprising:
a plurality of second temporary decision sections configured to perform symbol decisions of the second digital signal sequences output from the phase rotation section and output second symbol signal sequences;
a cycle-slip detection section configured to detect cycle slips in the second digital signal sequences based on a second symbol signal sequence corresponding to the second symbol signal sequence with the highest signal-to-noise ratio, of the plurality of second symbol signal sequences; and
a plurality of cycle-slip compensation sections configured to perform processing for compensating for phase rotation due to the cycle slips, on the plurality of second digital signal sequences, respectively.

### Claim 6 (depends on 5)

The received signal processor according to claim 5, further comprising:
a weight calculation section configured to calculate weights each of which being a ratio of the respective signal-to-noise ratio to a maximum value of the signal-to-noise ratio;
a plurality of multiplication sections configured to multiply the weights by third digital signal sequences output from the cycle-slip compensation sections, respectively;
an addition section configured to calculate a sum of a plurality of weighted digital signals output from the plurality of multiplication sections; and
a decision section configured to perform symbol decision from a signal output from the addition section.

### Claim 7 (depends on 5)

The received signal processor according to claim 5, further comprising
a selection section configured to select a second symbol signal sequence corresponding to the digital signal sequence with lower signal-to-noise ratio from among the plurality of second symbol signal sequences,
wherein the cycle-slip detection section detects a cycle slip in the second digital signal sequence, based on the second symbol signal sequence selected by the selection section and the second symbol signal sequence corresponding to the digital signal sequence with the highest signal-to-noise ratio.

### Claim 8

A method for processing a received signal, comprising:
estimating respective signal-to-noise ratios of a plurality of digital signal sequences in which relative phase errors of a plurality of received signal sequences have been corrected;
generating a plurality of symbol signal sequences by performing symbol decisions of the plurality of digital signal sequences;
determining respective phase rotation amounts of the plurality of digital signal sequences from the plurality of symbol signal sequences and the respective signal-to-noise ratios of the plurality of digital signal sequences; and
rotating phases of the plurality of digital signal sequences respectively based on the phase rotation amounts.

### Claim 9 (depends on 8)

The method for processing a received signal according to claim 8,
wherein the determining of the phase rotation amounts includes determining the respective phase rotation amounts in order to match, to a phase of a digital signal sequence with the highest signal-to-noise ratio among the plurality of digital signal sequences, phases of the other digital signal sequences.

### Claim 10 (depends on 8)

The method for processing a received signal according to claim 8, further comprising:
generating a plurality of second symbol signal sequences by performing symbol decisions of second digital signal sequences obtained by rotating phases of the plurality of digital signal sequences based on the phase rotation amounts, respectively;
detecting cycle slips in the second digital signal sequences based on a second symbol signal sequence corresponding to the second symbol signal sequence with the highest signal-to-noise ratio, of the plurality of second symbol signal sequences; and
performing processing for compensating for phase rotation due to the cycle slips, on the plurality of second digital signal sequences, respectively.

### Claim 11 (depends on 2)

The received signal processor according to claim 2, wherein
the symbol-map-rotation determination section
determines the phase rotation amount from the plurality of symbol signal sequences and the respective signal-to-noise ratios of the plurality of digital signal sequences, for the symbol signal sequence corresponding to the digital signal sequence with the signal-to-noise ratio not larger than a predetermined threshold, and
determines to set the phase rotation amount at a value already calculated, for a symbol signal sequence corresponding to the digital signal sequence with the signal-to-noise ratio higher than the predetermined threshold.

### Claim 12 (depends on 2)

The received signal processor according to claim 2, further comprising:
a weight calculation section configured to calculate weights each of which is a ratio of the respective signal-to-noise ratio to a maximum value of the signal-to-noise ratio;
a plurality of multiplication sections configured to multiply the weights by second digital signal sequences output from the phase rotation section, respectively;
an addition section configured to calculate a sum of a plurality of weighted digital signals output from the plurality of multiplication sections; and
a decision section configured to perform symbol decision from a signal output from the addition section.

### Claim 13 (depends on 3)

The received signal processor according to claim 3, further comprising:
a weight calculation section configured to calculate weights each of which is a ratio of the respective signal-to-noise ratio to a maximum value of the signal-to-noise ratio;
a plurality of multiplication sections configured to multiply the weights by second digital signal sequences output from the phase rotation section, respectively;
an addition section configured to calculate a sum of a plurality of weighted digital signals output from the plurality of multiplication sections; and
a decision section configured to perform symbol decision from a signal output from the addition section.

### Claim 14 (depends on 2)

The received signal processor according to claim 2, further comprising:
a plurality of second temporary decision sections configured to perform symbol decisions of the second digital signal sequences output from the phase rotation section and output second symbol signal sequences;
a cycle-slip detection section configured to detect cycle slips in the second digital signal sequences based on a second symbol signal sequence corresponding to the second symbol signal sequence with the highest signal-to-noise ratio, of the plurality of second symbol signal sequences; and
a plurality of cycle-slip compensation sections configured to perform processing for compensating for phase rotation due to the cycle slips, on the plurality of second digital signal sequences, respectively.

### Claim 15 (depends on 3)

The received signal processor according to claim 3, further comprising:
a plurality of second temporary decision sections configured to perform symbol decisions of the second digital signal sequences output from the phase rotation section and output second symbol signal sequences;
a cycle-slip detection section configured to detect cycle slips in the second digital signal sequences based on a second symbol signal sequence corresponding to the second symbol signal sequence with the highest signal-to-noise ratio, of the plurality of second symbol signal sequences; and
a plurality of cycle-slip compensation sections configured to perform processing for compensating for phase rotation due to the cycle slips, on the plurality of second digital signal sequences, respectively.

### Claim 16 (depends on 14)

The received signal processor according to claim 14, further comprising:
a weight calculation section configured to calculate weights each of which is a ratio of the respective signal-to-noise ratio to a maximum value of the signal-to-noise ratio;
a plurality of multiplication sections configured to multiply the weights by third digital signal sequences output from the cycle-slip compensation section, respectively;
an addition section configured to calculate a sum of a plurality of weighted digital signals output from the plurality of multiplication sections; and
a decision section configured to perform symbol decision from a signal output from the addition section.

### Claim 17 (depends on 15)

The received signal processor according to claim 15, further comprising:
a weight calculation section configured to calculate weights each of which is a ratio of the respective signal-to-noise ratio to a maximum value of the signal-to-noise ratio;
a plurality of multiplication sections configured to multiply the weights by third digital signal sequences output from the cycle-slip compensation section, respectively;
an addition section configured to calculate a sum of a plurality of weighted digital signals output from the plurality of multiplication sections; and
a decision section configured to perform symbol decision from a signal output from the addition section.

### Claim 18 (depends on 6)

The received signal processor according to claim 6, further comprising
a selection section configured to select a second symbol signal sequence corresponding to the digital signal sequence with lower signal-to-noise ratio from among the plurality of second symbol signal sequences,
wherein the cycle-slip detection section detects a cycle slip in the second digital signal sequence, based on the second symbol signal sequence selected by the selection section and the second symbol signal sequence corresponding to the digital signal sequence with the highest signal-to-noise ratio.

### Claim 19 (depends on 9)

The method for processing a received signal according to claim 9, further comprising:
generating a plurality of second symbol signal sequences by performing symbol decisions of second digital signal sequences obtained by rotating phases of the plurality of digital signal sequences based on the phase rotation amounts, respectively;
detecting cycle slips in the second digital signal sequences based on a second symbol signal sequence corresponding to the second symbol signal sequence with the highest signal-to-noise ratio, of the plurality of second symbol signal sequences; and
performing processing for compensating for phase rotation due to the cycle slips, on the plurality of second digital signal sequences, respectively.
