# US 2018/0323791 A1 · Frequency generating circuit using quartz crystal resonator > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0323791 A1 - Document ID: US20180323791A1 - Status: Published application - Kind: A1 - Application number: 15/585,644 - Filed: 2017-05-03 - Published: 2018-11-08 - Earliest claimed: 2017-05-03 - Inventors: Ping-Ying WANG - Web page: https://patentgrep.com/patent/US20180323791A1 ## CPC - H03B 5/32: being a piezoelectric resonator (selection of piezoelectric material H10N30/00) - H03L 1/022: {by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature (H03L1/021 takes precedence)} - H03L 7/0805: {the loop being adapted to provide an additional control signal for use outside the loop} - H03L 7/099: concerning mainly the controlled oscillator of the loop - H03L 7/18: using a frequency divider or counter in the loop (H03L7/20, H03L7/22 take precedence) - H03B: GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS (generators adapted for electrophonic musical instruments G10H; masers or lasers H01S; generation of oscillations in plasma H05H) - H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B) ## Abstract A frequency generating circuit includes: a delay circuit, arranged to operably delay an output frequency signal to generate a delayed signal; a quartz crystal resonator, coupled with the delay circuit, arranged to operably conduct a band-pass filtering operation on the delayed signal to generate the output frequency signal; and a delay control circuit, coupled with the delay circuit, arranged to operably control a phase delay amount of the delay circuit to thereby control the phase of the delayed signal. ## Claims ### Claim 1 A frequency generating circuit (100), comprising: a delay circuit (110), arranged to operably delay an output frequency signal (Fout) to generate a delayed signal (Pd); a quartz crystal resonator (120), coupled with the delay circuit (110), arranged to operably conduct a band-pass filtering operation on the delayed signal (Pd) to generate the output frequency signal (Fout); a reference frequency generating circuit (130) arranged to operably generate a reference frequency signal (Fref) under control of a control signal (CTL); a delay control circuit (140), coupled with the delay circuit (110), arranged to operably control a phase delay amount of the delay circuit (110) to thereby control the phase of the delayed signal (Pd); and a calibration circuit (150), coupled with the quartz crystal resonator (120), the reference frequency generating circuit (130), and the delay control circuit (140), arranged to operably generate the control signal (CTL) according to the reference frequency signal (Fref) and one of the output frequency signal (Fout) and the delayed signal (Pd). ### Claim 2 (canceled) ### Claim 3 (depends on 1) The frequency generating circuit (100) of claim 1, wherein the reference frequency generating circuit (130) is further coupled with the quartz crystal resonator (120) and arranged to operably delay the output frequency signal (Fout) to generate the reference frequency signal (Fref); wherein the calibration circuit (150) is arranged to operably utilize the control signal (CTL) to control a phase delay amount of the reference frequency generating circuit (130). ### Claim 4 (depends on 3) The frequency generating circuit (100) of claim 3, wherein the reference frequency generating circuit (130) is a voltage-controlled delay circuit, and the calibration circuit (150) is arranged to operably provide the control signal (CTL) to be an operating voltage of the reference frequency generating circuit (130) so as to control the phase delay amount of the reference frequency generating circuit (130). ### Claim 5 (depends on 1) The frequency generating circuit (100) of claim 1, wherein the calibration circuit (150) comprises: a frequency detector (253), coupled with the reference frequency generating circuit (130) and the delay control circuit (140), arranged to operably compare a frequency difference between the reference frequency signal (Fref) and a target signal to generate the control signal (CTL); wherein the target signal is the output frequency signal (Fout), the delayed signal (Pd), a first frequency-divided signal generated based on the output frequency signal (Fout), or a second frequency-divided signal generated based on the delayed signal (Pd). ### Claim 6 (depends on 1) The frequency generating circuit (100) of claim 1, wherein the calibration circuit (150) comprises: a phase detector (453), coupled with the reference frequency generating circuit (130), arranged to operably compare a phase difference between the reference frequency signal (Fref) and a target signal; a charge pump (455), coupled with the phase detector (453), arranged to operably generate an output voltage according to a detection result of the phase detector (453); and a loop filter (457), coupled with the charge pump (455), the reference frequency generating circuit (130), and the delay control circuit (140), arranged to operably reduce noise in the output voltage of the charge pump (455) to generate the control signal (CTL); wherein the target signal is the output frequency signal (Fout), the delayed signal (Pd), a first frequency-divided signal generated based on the output frequency signal (Fout), or a second frequency-divided signal generated based on the delayed signal (Pd). ### Claim 7 (depends on 1) The frequency generating circuit (100) of claim 1, wherein the calibration circuit (150) comprises: a digital phase detector (653), coupled with the reference frequency generating circuit (130), arranged to operably compare a phase difference between the reference frequency signal (Fref) and a target signal to generate a digital control value (DV); and a digital loop filter (655), coupled with the digital phase detector (653), the reference frequency generating circuit (130), and the delay control circuit (140), arranged to operably generate the control signal (CTL) according to the digital control value (DV); wherein the target signal is the output frequency signal (Fout), the delayed signal (Pd), a first frequency-divided signal generated based on the output frequency signal (Fout), or a second frequency-divided signal generated based on the delayed signal (Pd). ### Claim 8 (depends on 1) The frequency generating circuit (100) of claim 1, wherein the delay control circuit (140) comprises: an operational amplifier (941) comprising a first input terminal (+) and a second input terminal (−), wherein the first input terminal (+) is coupled with the delay circuit (110) and arranged to operably control the phase delay amount of the delay circuit (110); a first resistance element (943), coupled between an output terminal and the first input terminal (+) of the operational amplifier (941); a second resistance element (947), coupled between the output terminal and the second input terminal (−) of the operational amplifier (941); and a third resistance element (949), coupled between the second input terminal (−) of the operational amplifier (941) and the fixed-voltage terminal. ### Claim 9 (depends on 8) The frequency generating circuit (100) of claim 8, wherein the first input terminal (+) of the delay control circuit (140) is configured to operably provide an operating voltage of the delay circuit (110). ### Claim 10 (depends on 1) The frequency generating circuit (100) of claim 1, wherein the delay circuit (110) comprises a ring oscillator. ### Claim 11 A frequency generating circuit (100), comprising: a delay circuit (110), arranged to operably delay an output frequency signal (Fout) to generate a delayed signal (Pd); a quartz crystal resonator (120), coupled with the delay circuit (110), arranged to operably conduct a band-pass filtering operation on the delayed signal (Pd) to generate the output frequency signal (Fout); and a delay control circuit (140), coupled with the delay circuit (110), arranged to operably control a phase delay amount of the delay circuit (110) to thereby control the phase of the delayed signal (Pd); wherein the delay control circuit (140) comprises: an operational amplifier (941) comprising a first input terminal (+) and a second input terminal (−), wherein the first input terminal (+) is coupled with the delay circuit (110) and arranged to operably control the phase delay amount of the delay circuit (110); a first resistance element (943), coupled between an output terminal and the first input terminal (+) of the operational amplifier (941); a second resistance element (947), coupled between the output terminal and the second input terminal (−) of the operational amplifier (941); and a third resistance element (949), coupled between the second input terminal (−) of the operational amplifier (941) and the fixed-voltage terminal. ### Claim 12 (depends on 11) The frequency generating circuit (100) of claim 11, wherein the first input terminal (+) of the delay control circuit (140) is configured to operably provide an operating voltage of the delay circuit (110).