# US 2018/0323699 A1 · Power Loss Protection Integrated Circuit With Autonomous Capacitor Health Check

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- Number: US 2018/0323699 A1
- Document ID: US20180323699A1
- Status: Published application
- Kind: A1
- Application number: 16/030,865
- Filed: 2018-07-10
- Published: 2018-11-08
- Earliest claimed: 2016-06-25
- Assignees: Active-Semi, Inc.
- Applicants: Active-Semi, Inc.
- Inventors: John H. Carpenter, JR.; Brett E. Smith
- Web page: https://patentgrep.com/patent/US20180323699A1

## CPC

- G01R 31/64: Testing of capacitors
- G01R 19/2513: {Arrangements for monitoring electric power systems, e.g. power lines or loads; Logging}
- G01R 27/2605: {Measuring capacitance (capacitive sensors G01D5/24)}
- G01R 31/3835: involving only voltage measurements
- G01R 31/392: Determining battery ageing or deterioration, e.g. state of health
- G05B 11/28: using pulse-height modulation; using pulse-width modulation
- G05B 15/02: electric
- G05F 1/66: Regulating electric power
- G06F 1/30: Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations (for resetting only G06F1/24)
- G06F 11/0757: {by exceeding a time limit, i.e. time-out, e.g. watchdogs}
- G06F 11/3013: {where the computing system is an embedded system, i.e. a combination of hardware and software dedicated to perform a certain function in mobile devices, printers, automotive or aircraft systems (testing or monitoring of control systems or parts thereof G05B23/02)}
- G06F 11/3062: {where the monitored property is the power consumption (power management in a computing system G06F1/3203)}
- H01H 85/0241: {Structural association of a fuse and another component or apparatus (switches with built-in fuses H01H9/10, spark-gap arresters H01H85/44, transformers and inductances H01F27/402, capacitors H01G2/14, lamps H01K1/66, semiconductors H10W20/493 or H10W42/80)}
- H02H 3/08: responsive to excess current (responsive to abnormal temperature caused by excess current H02H5/04)
- H02J 9/061: {for DC powered loads}
- H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M 1/32: Means for protecting converters other than automatic disconnection
- H02M 3/156: with automatic control of output voltage or current, e.g. switching regulators
- H02M 3/158: including plural semiconductor devices as final control devices for a single load
- H02M 3/1582: {Buck-boost converters (H02M3/1584 takes precedence)}
- H02M 3/1588: {comprising at least one synchronous rectifier element (H02M3/1582, H02M3/1584 take precedence)}
- G06F 2201/81: Threshold
- H02M 1/0009: {Devices or circuits for detecting current in a converter}
- H03M 1/122: {Shared using a single converter or a part thereof for multiple channels, e.g. a residue amplifier for multiple stages}
- H03M 1/765: {using a single level of switches which are controlled by unary decoded digital signals}
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- G05B: CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS (systems for controlling or regulating non-electric variables G05D; systems for regulating electric or magnetic variables G05F; control devices or systems insofar as characterised by mechanical features only G05G)
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H01H: ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES (contact cables H01B7/10; electrolytic self-interrupters H01G9/18; emergency protective circuit arrangements H02H; switching by electronic means without contact-making H03K17/00)
- H02H: EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS (indicating or signalling undesired working conditions G01R, e.g. G01R31/00, G08B; locating faults along lines G01R31/08; emergency protective devices H01H)
- H02J: ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

A power loss protection integrated circuit includes a storage capacitor terminal (STR), an autonomous capacitor health check circuit, and a capacitor fault terminal (CF). The capacitor health check circuit autonomously performs periodic capacitor check operations. In a check operation, current is sinked from the STR terminal for a predetermined time and in a predetermined way. If during this time the voltage on the STR terminal STR drops below a predetermined voltage, then a digital signal CF is asserted onto the CF terminal. Immediately following each capacitor check, a charging voltage is driven onto the STR terminal to recharge the external capacitors coupled to the STR terminal. In one example, the integrated circuit further includes a current switch circuit (eFuse) and a buck/boost controller. The capacitor health check circuit is only enabled during normal mode operation of the integrated circuit, and the check circuit disables boost operation during capacitor checks.

## Claims

### Claim at position 1

1-21. (canceled)

### Claim 22

An integrated circuit comprising:
an input voltage terminal (VIN);
an output voltage terminal (VOUT);
a current switch circuit;
a storage capacitor terminal (STR);
a switch terminal (SW);
a feedback terminal (FB);
a buck/boost controller coupled to the switch terminal SW and to the feedback terminal FB; and
an autonomous capacitor health check circuit adapted to sink a current from the storage capacitor terminal STR.

### Claim 23 (depends on 22)

The integrated circuit of claim 22, wherein the current that the autonomous capacitor health check circuit is adapted to sink from the storage capacitor terminal STR comprises a first predetermined current during a first portion of a predetermined time duration and a second predetermined current during a second portion of the predetermined time duration, and wherein the maximum input current is at least two amperes.

### Claim 24 (depends on 22)

The integrated circuit of claim 22, wherein the autonomous capacitor health check circuit comprises:
a register, wherein a value stored in the register determines a predetermined time duration, wherein during the predetermined time duration, the autonomous capacitor health check circuit detects whether a voltage on the storage capacitor terminal STR drops below a predetermined threshold voltage.

### Claim 25 (depends on 22)

The integrated circuit of claim 22, wherein the autonomous capacitor health check circuit comprises:
a register, wherein a value stored in the register determines a magnitude of the current that is sinked from the storage capacitor terminal STR.

### Claim 26 (depends on 23)

The integrated circuit of claim 23, wherein the autonomous capacitor health check circuit comprises:
a plurality of registers, wherein a first value stored in the plurality of registers determines a magnitude of the first predetermined current, and wherein a second value stored in the plurality of registers determines a magnitude of the second predetermined current.

### Claim 27 (depends on 24)

The integrated circuit of claim 24, wherein the autonomous capacitor health check circuit comprises:
a register, wherein a value stored in the register determines the predetermined threshold voltage.

### Claim 28 (depends on 22)

The integrated circuit of claim 22, wherein the autonomous capacitor health check circuit periodically performs a capacitor check by sinking a current from the storage capacitor terminal STR and detecting whether a voltage on the storage capacitor terminal STR drops below a predetermined threshold voltage within a time duration, wherein the autonomous capacitor health check circuit performs the periodic checking without repeated external prompting from any device outside the integrated circuit.

### Claim 29 (depends on 22)

The integrated circuit of claim 22, wherein the autonomous capacitor health check circuit comprises:
a current source adapted to sink the current from the storage capacitor terminal STR.

### Claim 30 (depends on 22)

The integrated circuit of claim 22, wherein the buck/boost controller is not coupled to an external inductor but rather is adapted to be coupled to the external inductor, wherein the buck/boost controller is not operating as part of any buck converter or as part of any boost converter but rather is adapted to operate as part of a buck converter and as part of a boost converter, and wherein the storage capacitor terminal STR is not coupled to an external storage capacitor but rather is adapted to be coupled to an external storage capacitor.

### Claim 31

An integrated circuit, comprising:
a first terminal;
a second terminal;
an eFuse circuit that can receive a current from the first terminal and can conduct the current to the second terminal in a non-fault condition, and that is adapted to decouple the first terminal from the second terminal in a fault condition;
a third terminal;
a fourth terminal; and
an autonomous capacitor health check circuit adapted to perform a capacitor health check operation, wherein a capacitor health check operation involves sinking a current from the fourth terminal for a predetermined time duration, and during the predetermined time duration detecting whether a voltage on the fourth terminal drops below a predetermined threshold voltage.

### Claim 32 (depends on 31)

The integrated circuit of claim 31, wherein the autonomous capacitor health check circuit comprises a register, wherein a multi-bit digital value stored in the register determines the predetermined threshold voltage.

### Claim 33 (depends on 31)

The integrated circuit of claim 31, wherein the autonomous capacitor health check circuit comprises a register, wherein a multi-bit digital value stored in the register determines the predetermined time duration.

### Claim 34 (depends on 31)

The integrated circuit of claim 31, wherein the autonomous capacitor health check circuit comprises a bit, wherein a setting of the bit causes digital logic signal to be asserted onto the third terminal, and wherein a reading of the bit causes the bit to be reset.

### Claim 35 (depends on 31)

The integrated circuit of claim 31, wherein the autonomous capacitor health check circuit comprises a first current source and a second current source, wherein the first current source is coupled to sink a first predetermined current from the fourth terminal during the health check operation, and wherein the second current source is coupled to sink a second predetermined current from the fourth terminal during the health check operation.

### Claim 36 (depends on 31)

The integrated circuit of claim 31, further comprising:
a boost controller, wherein the autonomous capacitor health check circuit supplies a digital boost disable signal to the boost controller.

### Claim 37 (depends on 31)

The integrated circuit of claim 31, further comprising:
a switching converter control circuit, wherein the autonomous capacitor health check circuit supplies a digital boost disable signal to the switching converter control circuit.

### Claim 38 (depends on 31)

The integrated circuit of claim 31, further comprising:
a serial bus interface, where a multi-bit digital value stored in a plurality of sequential logic elements determines the predetermined time duration of the capacitor health check operation, and wherein the multi-bit digital value stored in the plurality of sequential logic elements can be changed via the serial bus interface.

### Claim 39 (depends on 31)

The integrated circuit of claim 31, further comprising:
a serial bus interface, where a multi-bit digital value stored in a plurality of sequential logic elements determines the predetermined threshold voltage of the capacitor health check operation, and wherein the multi-bit digital value stored in the plurality of sequential logic elements can be changed via the serial bus interface.

### Claim 40 (depends on 31)

The integrated circuit of claim 31, wherein the current that the eFuse circuit can receive from the first terminal and can conduct to the second terminal in the non-fault condition can be a current of two amperes, wherein the eFuse circuit can conductor the two ampere current conduct a current with a resistance of less than one ohm between the first and second terminals.

### Claim 41

An integrated circuit, comprising:
an eFuse circuit;
a boost controller;
a terminal; and
means for performing periodic autonomous capacitor health check operations on a capacitor coupled to the terminal, wherein a capacitor health check operation involves conducting a current from the terminal and detecting a voltage on the terminal.

### Claim 42 (depends on 41)

The integrated circuit of claim 41, further comprising:
a second terminal; and
a third terminal, wherein the eFuse circuit can receive a current from the second terminal and can conduct the current to the third terminal in a non-fault condition, wherein the current can be a current of two amperes that is conducted through the eFuse circuit with a resistance of less than one ohm between the second the third terminals.