# US 2018/0323248 A1 · Display device, method of manufacturing the same, and electronic apparatus > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0323248 A1 - Document ID: US20180323248A1 - Status: Published application - Kind: A1 - Application number: 16/014,753 - Filed: 2018-06-21 - Published: 2018-11-08 - Earliest claimed: 2013-09-12 - Assignees: Sony Corporation - Applicants: Sony Corporation - Inventors: Seiichiro Jinta - Web page: https://patentgrep.com/patent/US20180323248A1 ## CPC - H10K 59/1213: {the pixel elements being TFTs} - G09G 3/2003: {Display of colours (specific for liquid crystal displays G09G3/3607)} - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - H10D 30/6731: {Top-gate only TFTs} - H10D 30/6732: {Bottom-gate only TFTs} - H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs} - H10D 30/6745: {Polycrystalline or microcrystalline silicon} - H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)} - H10D 64/665: {the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum (having lateral variation H10D64/671)} - H10D 86/021: {of multiple TFTs} - H10D 86/0221: {comprising manufacture, treatment or patterning of TFT semiconductor bodies} - H10D 86/0227: {using structural arrangements to control crystal growth, e.g. placement of grain filters} - H10D 86/421: {having a particular composition, shape or crystalline structure of the active layer} - H10D 86/425: {having different crystal properties in different TFTs or within an individual TFT} - H10D 86/431: {having different compositions, shapes, layouts or thicknesses of gate insulators in different TFTs} - H10D 86/471: {having different architectures, e.g. having both top-gate and bottom-gate TFTs} - H10D 86/60: wherein the TFTs are in active matrices - H10K 50/13: comprising stacked EL layers within one EL unit - H10K 59/131: Interconnections, e.g. wiring lines or terminals - H10K 59/351: {comprising more than three subpixels, e.g. red-green-blue-white [RGBW]} - G09G 2230/00: Details of flat display driving waveforms - G09G 2300/0426: Layout of electrodes and connections - G09G 2300/0452: Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components - G09G 2300/0809: Several active elements per pixel in active matrix panels - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/02: Improving the quality of display appearance - H10K 59/1201: {Manufacture or treatment} - H10K 59/353: {characterised by the geometrical arrangement of the RGB subpixels} - H10K 59/38: comprising colour filters or colour changing media [CCM] - H10K 2102/3026: {Top emission} - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract There is provided a display device including: a light emitting element; and a drive transistor (DRTr) that includes a coupling section (W1) and a plurality of channel sections (CH) coupled in series through the coupling section (W1), wherein the drive transistor (DRTr) is configured to supply a drive current to the light emitting element. ## Claims ### Claim 1 A display device comprising a plurality of pixels, at least one of the pixels includes: a light emitting element; a drive transistor configured to supply a drive current to the light emitting element; wherein the drive transistor includes a first channel region being a portion of a semiconductor layer, a first gate electrode, and an electrically-conductive layer, wherein the first channel region is formed on a first insulating layer, and the electrically-conductive layer is formed between the first insulating layer and a substrate; a write transistor configured to transfer a pixel voltage corresponding to a luminance intensity of the light emitting element, wherein the write transistor includes a second channel region being a portion of the semiconductor layer and a second gate electrode, wherein the second channel region is formed on the first insulating layer; a first metal wiring in contact with the semiconductor layer via a first contact region; and a second metal wiring in contact with the semiconductor layer via a second contact region, the first channel region being a part of a current path between the first contact region and the second contact region, wherein the first gate electrode overlaps with a part of the semiconductor layer within the current path in a planer view, and a substantially entire portion of the first gate electrode overlaps with the electrically conductive layer in the planer view, and at least a portion of the second gate electrode does not overlap with any electrically-conductive layers between the first insulating layer and the substrate in the planer view. ### Claim 2 (depends on 1) The display device according to claim 1, wherein said one of the pixels further includes a capacitor having a first node and a second node, the write transistor is connected between the first electrode of the capacitor and a data line, the first gate electrode of the drive transistor is connected to the first node of the capacitor, and the second node of the capacitor is connected to an anode electrode of the light emitting element. ### Claim 3 (depends on 1) The display device according to claim 1, wherein the electrically-conductive layer and the first gate electrode include molybdenum (Mo). ### Claim 4 (depends on 1) The display device according to claim 1, wherein the write transistor does not include any electrically-conductive layers between the first insulating layer and the substrate, below the second channel region. ### Claim 5 (depends on 1) The display device according to claim 1, wherein the drive transistor further includes a second insulating layer, and wherein the first channel region is disposed between the first insulating layer and the second insulating layer. ### Claim 6 (depends on 5) The display device according to claim 5, wherein the drive transistor further includes a third insulating layer, the first gate electrode is formed on the second insulating layer, and the first gate electrode is disposed between the second insulating layer and the third insulating layer. ### Claim 7 (depends on 6) The display device according to claim 6, wherein the first insulating layer, the semiconductor layer, and the second insulating layer are the only layers disposed between the electrically-conductive layer and the first gate electrode. ### Claim 8 (depends on 1) The display device according to claim 1, wherein the semiconductor layer within the current path has a recess portion in a planer view, above the electrically-conductive layer. ### Claim 9 (depends on 8) The display device according to claim 8, wherein the semiconductor layer within the current path has a plurality of the recess portions in the planer view, above the electrically-conductive layer, and at least one of the recess portions overlaps with the first gate electrode in the planer view. ### Claim 10 (depends on 1) The display device according to claim 1, wherein the first channel region and the second channel region are formed as distinct semiconductor pieces from each other, each of the distinct semiconductor pieces being portions of the semiconductor layer. ### Claim 11 (depends on 1) The display device according to claim 1, wherein said at least one of the pixels includes a third metal wiring in contact with the semiconductor layer via a third contact region. ### Claim 12 (depends on 11) The display device according to claim 11, wherein said at least one of the pixels further includes a fourth metal wiring in contact with the semiconductor layer via a fourth contact region, the second channel region being between the third contact region and the fourth contact region. ### Claim 13 (depends on 1) The display device according to claim 1, wherein one of the first metal wiring or the second metal wiring is in contact with an anode electrode of the light emitting element so as to supply the drive current to the light emitting element. ### Claim 14 (depends on 1) The display device according to claim 1, wherein the first metal wiring and the second metal wiring are disposed on a third insulating layer which covers the first gate electrode and the second gate electrode. ### Claim 15 (depends on 14) The display device according to claim 14, wherein a fourth insulating layer, on which anode electrodes are disposed, covers the first metal wiring and the second metal wiring. ### Claim 16 A display device comprising a plurality of pixels, at least one of the pixels includes: a light emitting element; a drive transistor configured to supply a drive current to the light emitting element; wherein the drive transistor includes a first channel region being a portion of a semiconductor layer, a first gate electrode, and an electrically-conductive layer, wherein the first channel region is formed on a first insulating layer, and the electrically-conductive layer is formed between the first insulating layer and a substrate; a write transistor configured to transfer a pixel voltage corresponding to a luminance intensity of the light emitting element, wherein the write transistor includes a second channel region being a portion of the semiconductor layer and a second gate electrode, wherein the second channel region is formed on the first insulating layer; a first metal wiring in contact with the semiconductor layer via a first contact region; and a second metal wiring in contact with the semiconductor layer via a second contact region, the first channel region being a part of a current path between the first contact region and the second contact region, wherein the semiconductor layer within the current path has a bent-shaped portion above the electrically-conductive layer. ### Claim 17 (depends on 16) The display device according to claim 16, wherein said one of the pixels further includes a capacitor having a first node and a second node, the write transistor is connected between the first electrode of the capacitor and a data line, the first gate electrode of the drive transistor is connected to the first node of the capacitor, and the second node of the capacitor is connected to an anode electrode of the light emitting element. ### Claim 18 (depends on 16) The display device according to claim 16, wherein the electrically-conductive layer and the first gate electrode include molybdenum (Mo). ### Claim 19 (depends on 16) The display device according to claim 16, wherein the write transistor does not include any electrically-conductive layers between the first insulating layer and the substrate. ### Claim 20 (depends on 16) The display device according to claim 16, wherein the semiconductor layer includes a plurality of channel regions between the first contact region and the second contact region. ### Claim 21 (depends on 20) The display device according to claim 20, wherein each channel region of the plurality of channel regions is aligned in a common direction. ### Claim 22 (depends on 16) The display device according to claim 16, wherein the semiconductor layer within the current path includes a plurality of bent-shaped portions, and at least one of the bent-shaped portions does not overlap with the first gate electrode. ### Claim 23 (depends on 16) The display device according to claim 16, wherein the bent-shaped portion is a “U” shaped portion. ### Claim 24 (depends on 16) The display device according to claim 16, wherein the first channel region and the second channel region are formed as distinct semiconductor pieces from each other, each of the distinct semiconductor pieces being portions of the semiconductor layer. ### Claim 25 (depends on 16) The display device according to claim 16, wherein the first channel region and the second channel region are made of poly-silicon, and formed by applying a laser beam under a same application condition during annealing treatment. ### Claim 26 (depends on 16) The display device according to claim 16, wherein a grain size of the first channel region and a grain size of the second channel region are different from each other. ### Claim 27 (depends on 16) The display device according to claim 16, wherein one of the first metal wiring or the second metal wiring is in contact with an anode electrode of the light emitting element so as to supply the drive current to the light emitting element. ### Claim 28 (depends on 16) The display device according to claim 16, wherein the first metal wiring and the second metal wiring are disposed on a third insulating layer which covers the first gate electrode and the second gate electrode. ### Claim 29 (depends on 28) The display device according to claim 28, wherein a fourth insulating layer, on which anode electrodes are disposed, covers the first metal wiring and the second metal wiring.