# US 2018/0323237 A1 · Phase-change memory

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- Number: US 2018/0323237 A1
- Document ID: US20180323237A1
- Status: Published application
- Kind: A1
- Application number: 15/968,474
- Filed: 2018-05-01
- Published: 2018-11-08
- Earliest claimed: 2017-05-05
- Assignees: STMicroelectronics (Crolles 2) SAS
- Applicants: STMicroelectronics (Crolles 2) SAS
- Inventors: Pierre MORIN; Philippe BRUN; Laurent-Luc CHAPELON
- Web page: https://patentgrep.com/patent/US20180323237A1

## CPC

- H10B 63/80: {Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays}
- H10B 63/82: {the switching components having a common active material layer}
- H10N 70/231: {based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/8413: {adapted for resistive heating}
- H10N 70/8828: {Tellurides, e.g. GeSbTe}
- H10P 14/69391: {the material containing aluminium, e.g. Al2O3}
- H10P 14/69433: {the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz}
- H10W 20/033: {in openings in dielectrics}
- H10W 20/056: {by filling conductive material into holes, grooves or trenches}
- H10W 20/0698: {Local interconnections}
- H10W 20/081: {by forming openings in the dielectric parts}
- H10W 20/42: Vias, e.g. via plugs
- H10W 20/425: {Barrier, adhesion or liner layers}
- H10W 20/43: Layouts of interconnections
- H10W 20/48: Insulating materials thereof
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A phase-change memory includes a strip of phase-change material that is coated with a conductive strip and surrounded by an insulator. The strip of phase-change material has a lower face in contact with tips of a resistive element. A connection network composed of several levels of metallization coupled with one another by conducting vias is provided above the conductive strip. At least one element of a lower level of the metallization is in direct contact with the upper surface of the conductive strip.

## Claims

### Claim 1

A phase-change memory, comprising:
a strip of phase-change material coated with a conductive strip and surrounded by an insulator, the strip of phase-change material being in contact via a lower face with tips of resistive elements; and
a connection network composed of several levels of metallization coupled with one another by conducting vias, at least one element of the lower metallization level being in direct contact with an upper face of the conductive strip.

### Claim 2 (depends on 1)

The phase-change memory according to claim 1, wherein the elements of the lower metallization level comprise a cladding made of tantalum nitride and a core made of copper.

### Claim 3 (depends on 1)

The phase-change memory according to claim 1, wherein said insulator is silicon nitride.

### Claim 4

A phase-change memory, comprising:
a strip of phase-change material;
a metal conductive strip on a top surface of the strip of phase-change material;
a first insulating layer laterally surrounding the metal conductive strip and the strip of phase-change material;
an etch stop layer above the metal conductive strip and the first insulating layer;
wherein the etch stop layer includes an opening extending through the etch stop layer to a top surface of the metal conductive strip; and
a metal connection structure filling said opening.

### Claim 5 (depends on 4)

The phase-change memory of claim 4, wherein the metal connection structure is a component of a connection network composed of several levels of metallization.

### Claim 6 (depends on 4)

The phase-change memory of claim 4, wherein the metal connection structure comprises: metal liner layer lining side walls and a bottom of the opening; and a metal fill in contact with the metal liner layer.

### Claim 7 (depends on 6)

The phase-change memory of claim 6, wherein the metal liner layer is a cladding made of tantalum nitride and the metal fill is a core made of copper.

### Claim 8 (depends on 4)

The phase-change memory of claim 4, wherein said first insulating layer is made of silicon nitride.

### Claim 9 (depends on 4)

The phase-change memory of claim 4, wherein the strip of phase-change material has a width and length longer than the width, and wherein the metal conductive strip has a width and length longer than the width, and wherein the widths of the strip of phase-change material and metal conductive strip are the same.

### Claim 10

A method of fabricating a phase-change memory, comprising:
uncovering an upper face of a conductive strip that covers a strip of phase-change material, the strip of phase-change material being surrounded by at least a first insulator and in contact via a lower face with tips of resistive elements;
depositing an etch-stop layer on the conductive strip and first insulator; and
forming at least one element of a lower metallization level of a connection network within the etch-stop layer, in direct contact with a top surface of the conductive strip.

### Claim 11 (depends on 10)

The method according to claim 10, wherein forming the at least one element of the lower metallization level comprises:
forming a cavity in the etch-stop layer that extends through the etch-stop layer and reaches the top surface of the conductive strip; and
filling the cavity with one or more metal materials.

### Claim 12 (depends on 11)

The method according to claim 11, wherein filling the cavity comprises depositing a cladding made of tantalum nitride and depositing a core made of copper.

### Claim 13 (depends on 10)

The method according to claim 10, wherein the etch-stop layer is made of a second insulating material whose etching is highly selective with respect to the first insulator surrounding the layer of phase-change material.

### Claim 14 (depends on 10)

The method according to claim 10, wherein the first insulator is silicon nitride and the etch-stop layer is made of a material selected from the group consisting of Al2O3 and AlN.

### Claim 15 (depends on 10)

The method according to claim 10, wherein a thickness of the etch-stop layer is in a range between 5 and 10 nm.

### Claim 16

A phase-change memory, comprising:
a strip of phase-change material coated with a conductive strip and surrounded by an insulator, the strip of phase-change material being in contact via a lower face with tips of resistive elements;
an etch stop layer covering the conductive strip and the insulator, the etch stop layer in an insulating material whose etching is selectively with respect to the insulator; and
a connection network composed of several levels of metallization coupled with one another by conducting vias, at least one element of the lower metallization level being in direct contact with an upper face of the conductive strip through an opening in the etch stop layer.

### Claim 17 (depends on 16)

The phase-change memory according to claim 16, wherein the elements of the lower metallization level comprise a cladding made of tantalum nitride and a core made of copper.

### Claim 18 (depends on 17)

The phase-change memory according to claim 17, wherein said insulator is silicon nitride.