# US 2018/0323233 A1 · Method of manufacturing a semiconductor device

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- Number: US 2018/0323233 A1
- Document ID: US20180323233A1
- Status: Published application
- Kind: A1
- Application number: 16/031,480
- Filed: 2018-07-10
- Published: 2018-11-08
- Earliest claimed: 2016-03-04
- Assignees: Sii Semiconductor Corporation
- Applicants: SII Semiconductor Corporation
- Inventors: Toshiro FUTATSUGI
- Web page: https://patentgrep.com/patent/US20180323233A1

## CPC

- H10F 39/014: {of CMOS image sensors}
- H10F 39/024: {of coatings or optical elements}
- H10F 39/80377: {characterised by the channel of the transistor, e.g. channel having a doping gradient}
- H10D 30/022: {having lightly-doped source or drain extensions selectively formed at the sides of the gates}
- H10D 30/0227: {having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET}
- H10D 30/601: {having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs (lightly doped source or drain extensions for TFTs H10D30/6715)}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

In order to form a light receiving element having high reliability and a MOS transistor together on the same silicon substrate, after forming a gate electrode of the MOS transistor, a gate oxide film in a light receiving element forming region is removed. Then, a thermal oxide film is newly formed in the light receiving element forming region, and ion implantation is performed in the light receiving element forming region through the thermal oxide film such that a shallow pn junction is formed.

## Claims

### Claim 1

A method of manufacturing a semiconductor device, comprising:
forming a first thermal oxide film serving as a gate oxide film of a MOS transistor on a surface of a silicon substrate having a light receiving element forming region and a MOS transistor forming region;
forming a polysilicon film on the first thermal oxide film;
patterning the polysilicon film, to thereby form a gate electrode of the MOS transistor in the MOS transistor forming region;
removing the first thermal oxide film other than the first thermal oxide film under the gate electrode;
forming a second thermal oxide film on the surface of the silicon substrate; and
performing ion implantation of an impurity on the light receiving element forming region through the second thermal oxide film, to thereby form an impurity region.

### Claim 2 (depends on 1)

A method of manufacturing a semiconductor device according to claim 1, wherein the second thermal oxide film is formed on an upper surface and a side surface of the gate electrode.

### Claim 3 (depends on 1)

A method of manufacturing a semiconductor device according to claim 1, wherein the impurity is also implanted into the MOS transistor forming region through the ion implantation, to thereby form an LDD region of the MOS transistor.

### Claim 4 (depends on 1)

A method of manufacturing a semiconductor device according to claim 1, further comprising:
forming an insulating film on the second thermal oxide film; and
performing anisotropic etching in a state in which a mask layer is formed on the second thermal oxide film in the light receiving element forming region, such that a side wall comprising the insulating film is formed on a side surface of the gate electrode of the MOS transistor and the insulating film remains in the light receiving element forming region.

### Claim 5 (depends on 1)

A method of manufacturing a semiconductor device according to claim 1, further comprising:
forming a first insulating film on the second thermal oxide film;
forming a second insulating film on the first insulating film; and
performing anisotropic etching by using the first insulating film as an etching stopper, to thereby form a side wall comprising the second insulating film on a side surface of the gate electrode of the MOS transistor.

### Claim 6 (depends on 1)

A method of manufacturing a semiconductor device according to claim 1;
wherein an impurity concentration of the impurity region at an outermost surface of the silicon substrate is 1019 cm−3 or more, and
wherein a depth from the surface of the silicon substrate to a point at which the impurity concentration in the impurity region becomes 1017 cm−3 or less is 100 nm or less.

### Claim 7 (depends on 1)

A method of manufacturing a semiconductor device according to claim 1, wherein the second thermal oxide film has a thickness of 30 nm or less.