# US 2018/0323225 A1 · Solid-state imaging device, imaging device, and electronic apparatus > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0323225 A1 - Document ID: US20180323225A1 - Status: Published application - Kind: A1 - Application number: 15/771,792 - Filed: 2016-09-20 - Published: 2018-11-08 - Earliest claimed: 2015-11-05 - Assignees: Sony Semiconductor Solutions Corporation - Applicants: Sony Semiconductor Solutions Corporation - Inventors: Shigeki Nakamura; Seichi Otsuki - Web page: https://patentgrep.com/patent/US20180323225A1 ## CPC - H10F 39/12: Image sensors - H04N 23/6811: {based on the image signal} - H04N 23/689: {Motion occurring during a rolling shutter mode} - H04N 23/73: by influencing the exposure time - H04N 23/741: by increasing the dynamic range of the image compared to the dynamic range of the electronic image sensors - H04N 25/53: Control of the integration time - H04N 25/531: by controlling rolling shutters in CMOS SSIS - H04N 25/58: involving two or more exposures - H04N 25/583: with different integration times - H04N 25/589: with different integration times, e.g. short and long exposures - H04N 25/78: Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters - G03B 7/093: for control of exposure time - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION - G03B: APPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR (optical parts of such apparatus G02B; photosensitive materials or processes for photographic purposes G03C; apparatus for processing exposed photographic materials G03D) ## Abstract A solid-state imaging device according to the present disclosure includes a pixel array unit in which unit pixels including photoelectric conversion elements are arranged in a matrix form and the unit pixels are grouped into a plurality of pixel groups and a timing controller which independently sets an exposure start timing and an exposure end timing relative to each of the plurality of pixel groups so that at least one pixel group of the plurality of pixel groups is exposed a plurality of times within a single vertical synchronization period. ## Claims ### Claim 1 A solid-state imaging device comprising: a pixel array unit in which unit pixels including photoelectric conversion elements are arranged in a matrix form and the unit pixels are grouped into a plurality of pixel groups; and a timing controller configured to independently set an exposure start timing and an exposure end timing relative to each of the plurality of pixel groups so that at least one pixel group of the plurality of pixel groups is exposed a plurality of times within a single vertical synchronization period. ### Claim 2 (depends on 1) The solid-state imaging device according to claim 1, wherein the timing controller independently sets the exposure start timing and the exposure end timing relative to each of the plurality of pixel groups so that an exposure end timing of a unit pixel in a row which is read first of an exposure image to which exposure has been started later is earlier than an exposure end timing of a unit pixel of a row which is a final read row of an exposure image to which the exposure has been previously started regarding at least two times of exposures of the plurality of times of exposures. ### Claim 3 (depends on 2) The solid-state imaging device according to claim 2, wherein the timing controller performs control to output image data for each row in a time division manner regarding a plurality of exposure images of which the exposure ends are temporally overlapped. ### Claim 4 (depends on 1) The solid-state imaging device according to claim 1, further comprising: an image processor configured to generate an image with a high dynamic range on the basis of the image data of each exposure image of the plurality of pixel groups. ### Claim 5 (depends on 4) The solid-state imaging device according to claim 4, wherein the image processor includes a row sequence conversion unit which holds pixel value data for each row of an exposure image which is not exposed last within the single vertical synchronization period in a storage unit, reads the pixel value data of the same row from the storage unit according to an output timing of pixel value data for each row of an exposure image which is exposed last within the single vertical synchronization period, and outputs the plurality of exposure images as aligning the rows. ### Claim 6 (depends on 5) The solid-state imaging device according to claim 5, wherein the image processor includes a first image synthesis unit which synthesizes the pixel value data of the plurality of exposure pixels output from the row sequence conversion unit as aligning the rows between the plurality of exposure pixels and outputs the synthesized data. ### Claim 7 (depends on 4) The solid-state imaging device according to claim 4, wherein the image processor includes a second image synthesis unit which holds pixel value data of an exposure image which is exposed first within the single vertical synchronization period in the storage unit, calculates a synthesis pixel value of an exposure image of which an exposure order is other than first within the single vertical synchronization period with reference to pixel value data corresponding to a pixel position and a peripheral pixel position of the image which has been already held in the storage unit for each pixel and holds the calculated value in the storage unit, and outputs a final synthesis result when synthesis of pixel value data of an exposure image which is exposed last within the single vertical synchronization period has been completed. ### Claim 8 (depends on 7) The solid-state imaging device according to claim 7, wherein the second image synthesis unit holds pixel value data of an exposure image which is exposed first within the single vertical synchronization period in the storage unit, and calculates a synthesis pixel value of an exposure image of which an exposure order is other than first within the single vertical synchronization period with reference to the pixel value data corresponding to the pixel position and the peripheral pixel position of the image which has been already held in the storage unit for each pixel and holds the calculated value in the storage unit, in each pixel group. ### Claim 9 (depends on 7) The solid-state imaging device according to claim 7, wherein the image processor includes an inter-group synthesis unit which calculates a synthesis value between the pixel groups with reference to the final synthesis result of each pixel group obtained by synthesizing the exposure image which is exposed last within the single vertical synchronization period by the second image synthesis unit. ### Claim 10 (depends on 7) The solid-state imaging device according to claim 7, wherein the image processor includes a third image synthesis unit which holds the pixel value data of the exposure image which is exposed first within the single vertical synchronization period, of exposure images in all the pixel groups, in the storage unit, calculates a synthesis pixel value of the exposure image of which an exposure order is other than first within the single vertical synchronization period with reference to the pixel value data of the pixel position and the peripheral pixel position of the image which has been already held in the storage unit for each pixel and holds the calculated value in the storage unit, and outputs the final synthesis result when the synthesis of the pixel value data of the exposure image which is exposed last within the single vertical synchronization period has been completed. ### Claim 11 (depends on 10) The solid-state imaging device according to claim 10, wherein the image processor includes a pixel value interpolation unit which interpolates pixel values to all the pixel positions on the basis of pixel values read for the respective pixel groups, and the third image synthesis unit holds, in the storage unit, the pixel value data of the exposure image which is exposed first within the single vertical synchronization period of all the exposure images in all the pixel groups on the basis of an output of the pixel value interpolation unit, calculates a synthesis pixel value of an exposure image of which an exposure order is other than first within the single vertical synchronization period with reference to the pixel value data corresponding to the pixel position and the peripheral pixel position of the image which have been already held in the storage unit for each pixel, and holds the calculated synthesis pixel value in the storage unit. ### Claim 12 (depends on 7) The solid-state imaging device according to claim 7, wherein the image processor includes: a moving subject determination unit which determines whether a subject moves at each pixel position; and a synthesis ratio determination unit which determines a synthesis ratio at the time of calculating the synthesis pixel value on the basis of the determination result of the moving subject determination unit. ### Claim 13 (depends on 12) The solid-state imaging device according to claim 12, wherein the moving subject determination unit estimates whether the subject moves at each pixel position with reference to a pixel value of the exposure image and a pixel value in the storage unit. ### Claim 14 (depends on 12) The solid-state imaging device according to claim 12, wherein the image processor includes a synthesis ratio history storage unit which stores a history of the synthesis ratios determined by the synthesis ratio determination unit, and the synthesis ratio determination unit determines a synthesis ratio with reference to the history of the synthesis ratios stored in the synthesis ratio history storage unit. ### Claim 15 (depends on 12) The solid-state imaging device according to claim 12, wherein the synthesis ratio determination unit determines the synthesis ratio with reference to an exposure time of each exposure image. ### Claim 16 (depends on 12) The solid-state imaging device according to claim 12, wherein the synthesis ratio determination unit determines the synthesis ratio with reference to a pixel value level of each exposure image. ### Claim 17 (depends on 1) The solid-state imaging device according to claim 1, further comprising: an A/D converter configured to digitize an analog pixel signal output for each pixel column from each unit pixel of the pixel array unit. ### Claim 18 An imaging device comprising: a solid-state imaging device including: a pixel array unit in which unit pixels including photoelectric conversion elements are arranged in a matrix form and the unit pixels are grouped into a plurality of pixel groups; and a timing controller which independently sets an exposure start timing and an exposure end timing relative to each of the plurality of pixel groups so that at least one pixel group of the plurality of pixel groups is exposed a plurality of times within a single vertical synchronization period. ### Claim 19 (depends on 18) The imaging device according to claim 18, wherein in a case of capturing a light emitting object, the timing controller sets an exposure start time and an exposure time length of each of a plurality of exposure images imaged by the plurality of times of exposures in consideration of a blinking period of the light emitting object. ### Claim 20 An electronic apparatus comprising: a solid-state imaging device including: a pixel array unit in which unit pixels including photoelectric conversion elements are arranged in a matrix form and the unit pixels are grouped into a plurality of pixel groups; and a timing controller which independently sets an exposure start timing and an exposure end timing relative to each of the plurality of pixel groups so that at least one pixel group of the plurality of pixel groups is exposed a plurality of times within a single vertical synchronization period.