# US 2018/0323220 A1 · Metal oxide film and method for forming metal oxide film

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2018/0323220 A1
- Document ID: US20180323220A1
- Status: Published application
- Kind: A1
- Application number: 16/024,997
- Filed: 2018-07-02
- Published: 2018-11-08
- Earliest claimed: 2012-11-08
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Masahiro TAKAHASHI; Takuya HIROHASHI; Masashi TSUBUKU; Noritaka ISHIHARA; Masashi OOTA
- Web page: https://patentgrep.com/patent/US20180323220A1

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- C23C 14/086: {of zinc, germanium, cadmium, indium, tin, thallium or bismuth}
- G01N 23/207: Diffractometry using detectors, e.g. using a probe in a central position and one or more displaceable detectors in circumferential positions
- G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/6756: {Amorphous oxide semiconductors}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 62/40: Crystalline structures
- H10D 62/80: characterised by the materials
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10P 74/203: {Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects}
- H10P 14/22: using physical deposition, e.g. vacuum deposition or sputtering
- H10P 14/2901: {Materials}
- H10P 14/2922: {being non-crystalline insulating materials, e.g. glass or polymers}
- H10P 14/3426: {Oxides}
- H10P 14/3434: {being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424)}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)
- G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q)
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nmφ and less than or equal to 10 nmφ.

## Claims

### Claim 1

(canceled)

### Claim 2

A transistor comprising:
a channel formation region comprising an oxide semiconductor,
wherein a plurality of circumferentially distributed spots are observable in a nanobeam electron diffraction pattern of the oxide semiconductor.

### Claim 3 (depends on 2)

The transistor according to claim 2,
wherein a size of a crystalline part of the oxide semiconductor is less than or equal to 10 nm.

### Claim 4 (depends on 2)

The transistor according to claim 2,
wherein a measurement area of the nanobeam electron diffraction pattern is less than or equal to an area with a diameter of 10 nmφ.

### Claim 5 (depends on 2)

The transistor according to claim 2,
wherein the oxide semiconductor comprises indium, gallium, and zinc.

### Claim 6 (depends on 2)

The transistor according to claim 2,
wherein a size of a crystalline part of the oxide semiconductor is less than or equal to 5 nm.

### Claim 7

A transistor comprising:
a channel formation region comprising an oxide semiconductor,
wherein the oxide semiconductor comprises the channel formation region and a first region in contact with a source electrode and a second region in contact with a drain electrode, and
wherein a plurality of circumferentially distributed spots are observable in a nanobeam electron diffraction pattern of each of the channel formation region, the first region and the second region.

### Claim 8 (depends on 7)

The transistor according to claim 7,
wherein a measurement area of the nanobeam electron diffraction pattern is less than or equal to an area with a diameter of 10 nmφ.

### Claim 9 (depends on 7)

The transistor according to claim 7,
wherein the oxide semiconductor comprises indium gallium and zinc.

### Claim 10 (depends on 7)

The transistor according to claim 7,
wherein a size of a crystalline part of the oxide semiconductor is less than or equal to 5 nm.

### Claim 11

A transistor comprising:
a channel formation region,
wherein the channel formation region comprises an oxide semiconductor comprising a crystalline part,
wherein a crystalline peak is not observable in an XRD spectrum with respect to the oxide semiconductor.

### Claim 12 (depends on 11)

The transistor according to claim 11,
wherein a size of a crystalline part of the oxide semiconductor is less than or equal to 10 nm.

### Claim 13 (depends on 11)

The transistor according to claim 11,
wherein the XRD spectrum is obtained by out-of-plane method.

### Claim 14 (depends on 11)

The transistor according to claim 11,
wherein the oxide semiconductor comprises indium gallium and zinc.

### Claim 15 (depends on 11)

The transistor according to claim 11,
wherein a size of a crystalline part is less than or equal to 5 nm.

### Claim 16

A transistor comprising:
a channel formation region comprising an oxide semiconductor,
wherein the oxide semiconductor comprising a crystalline part,
wherein the oxide semiconductor comprises the channel formation region and a first region in contact with a source electrode and a second region in contact with a drain electrode,
wherein a crystalline peak is not observable in an XRD spectrum with respect to each of the channel formation region, the first region and the second region.

### Claim 17 (depends on 16)

The transistor according to claim 16,
wherein the XRD spectrum is obtained by out-of-plane method.

### Claim 18 (depends on 16)

The transistor according to claim 16,
wherein the oxide semiconductor comprises indium gallium and zinc.

### Claim 19 (depends on 16)

The transistor according to claim 16,
wherein a size of a crystalline part of the oxide semiconductor is less than or equal to 5 nm.