# US 2018/0323159 A1 · Microelectronic devices designed with high frequency communication devices including compound semiconductor devices integrated on an inter die fabric on package

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- Number: US 2018/0323159 A1
- Document ID: US20180323159A1
- Status: Published application
- Kind: A1
- Application number: 15/773,152
- Filed: 2015-12-22
- Published: 2018-11-08
- Earliest claimed: 2015-12-22
- Assignees: Intel Corporation
- Applicants: Intel Corporation
- Inventors: Telesphor KAMGAING; Georgios C. DOGIAMIS; Vijay K. NAIR
- Web page: https://patentgrep.com/patent/US20180323159A1

## CPC

- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H01Q 1/38: formed by a conductive layer on an insulating support {(patch antennas H01Q9/0407; microstrip dipole antennas H01Q9/065; microstrip slot antennas H01Q13/106; transmission line microstrip antennas H01Q13/206; manufacturing reflecting surfaces using insulating material for supporting the reflecting surface H01Q15/142)}
- H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/611: {for connecting multiple chips together}
- H10W 70/614: {the multiple chips being integrally enclosed}
- H10W 70/635: {Through-vias}
- H10W 90/00: Package configurations
- H01Q 1/243: {with built-in antennas}
- H10W 44/212: {Coaxial feed-throughs in substrates}
- H10W 44/241: {for passive devices or passive elements}
- H10W 44/248: {for antennas}
- H10W 70/63: Vias, e.g. via plugs
- H10W 70/685: comprising multiple insulating layers
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 72/248: {Top-view layouts, e.g. mirror arrays}
- H10W 72/9413: {on encapsulations}
- H10W 74/142: {the encapsulations exposing the passive side of the semiconductor body}
- H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/728: {between a chip and a stacked discrete passive device, e.g. resistors, capacitors or inductors}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H01Q: ANTENNAS, i.e. RADIO AERIALS (radiators or antennas for microwave heating H05B6/72)

## Abstract

Embodiments of the invention include a microelectronic device that includes an overmolded component having a first die with a silicon based substrate. A second die is coupled to the first die with the second die being formed with compound semiconductor materials in a different substrate. A substrate is coupled to the first die. The substrate includes an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher.

## Claims

### Claim 1

A microelectronic device comprising:
an overmolded component that includes a first die having a silicon based substrate;
a second die coupled to the first die; the second die being formed with compound semiconductor materials in a different substrate; and
a substrate coupled to the first die, the substrate including an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher.

### Claim 2 (depends on 1)

The microelectronic device of claim 1, further comprising:
at least one integrated passive die (IPD) coupled to at least one die, the IPD includes passives for passive matching networks.

### Claim 3 (depends on 2)

The microelectronic device of claim 2, wherein the at least one IPD is located within the overmolded component.

### Claim 4 (depends on 2)

The microelectronic device of claim 2, wherein the at least one IPD is electrical coupled to the first die and another component located within the overmolded component.

### Claim 5 (depends on 4)

The microelectronic device of claim 4, further comprising:
a third die coupled to the another component, the third die having at least one switch formed in compound semiconductor materials.

### Claim 6 (depends on 1)

The microelectronic device of claim 1, further comprising:
an interposer substrate to provide a spacing between the first die and the substrate and to electrically couple the first die and the substrate.

### Claim 7 (depends on 6)

The microelectronic device of claim 6, wherein the interposer substrate comprises a shield for shielding RF signals of the second die and a power supply.

### Claim 8 (depends on 1)

The microelectronic device of claim 1, wherein the microelectronic device comprises a 5G package architecture for 5G communications and beyond.

### Claim 9

A microelectronic device comprising:
a first overmolded component that includes a first die having a silicon based substrate;
a second overmolded component that includes a second die that is coupled to the first die; the second die being formed with compound semiconductor materials in a different substrate; and
a substrate coupled to at least one of the first die and the second die, the substrate including an antenna unit for transmitting and receiving communications at a frequency of approximately 15 GHz or higher.

### Claim 10 (depends on 9)

The microelectronic device of claim 9, further comprising:
at least one integrated passive die (IPD) coupled to at least one die, the IPD includes passives for passive matching networks.

### Claim 11 (depends on 10)

The microelectronic device of claim 10, wherein the at least one IPD is located within the first overmolded component.

### Claim 12 (depends on 10)

The microelectronic device of claim 10, wherein the at least one IPD is located within the second overmolded component and electrically coupled to the first die and another component located within the first overmolded component.

### Claim 13 (depends on 12)

The microelectronic device of claim 12, further comprising:
a third die coupled to the another component, the third die having at least one switch formed in compound semiconductor materials.

### Claim 14 (depends on 9)

The microelectronic device of claim 9, wherein the microelectronic device comprises a 5G package architecture for 5G communications.

### Claim 15

A computing device comprising:
at least one processor to process data; and
a communication module or chip coupled to the at least one processor, the communication module or chip comprises,
a first overmolded component that includes a first die having a silicon based substrate;
a second overmolded component that includes a second die that is coupled to the first die; the second die being formed with compound semiconductor materials; and
a substrate coupled to at least one of the first die and the second die, the substrate including an antenna unit for transmitting and receiving communications at a frequency of approximately 15 GHz or higher.

### Claim 16 (depends on 15)

The computing device of claim 15, further comprising:
at least one integrated passive die (IPD) coupled to at least one die, the IPD includes passives for passive matching networks.

### Claim 17 (depends on 16)

The computing device of claim 16, wherein the at least one IPD is located within the first overmolded component.

### Claim 18 (depends on 16)

The computing device of claim 16, wherein the at least one IPD is located within the second overmolded component and electrically coupled to the first die and another component located within the first overmolded component.

### Claim 19 (depends on 15)

The computing device of claim 15, further comprising:
a redistribution layer for electrically coupling the first and second dies to the substrate:
a plurality of thru mold connections of the second overmolded component;
a plurality of thru mold connections of the first overmolded component; and
at least one thru substrate connection of the first die.

### Claim 20 (depends on 15)

The computing device of claim 15, further comprising: a memory; a display module; and an input module, the memory, display module and input module being in operative communication on a chip chipset platform and each other.