# US 2018/0323153 A1 · Semiconductor device and method of forming backside openings for an ultra-thin semiconductor die

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- Number: US 2018/0323153 A1
- Document ID: US20180323153A1
- Status: Published application
- Kind: A1
- Application number: 16/035,838
- Filed: 2018-07-16
- Published: 2018-11-08
- Earliest claimed: 2017-03-08
- Assignees: Semiconductor Components Industries, LLC
- Applicants: Semiconductor Components Industries, LLC
- Inventors: Gordon M. GRIVNA
- Web page: https://patentgrep.com/patent/US20180323153A1

## CPC

- H10W 42/00: Arrangements for protection of devices (arrangements for thermal protection H10W40/00)
- H10P 54/00: Cutting or separating of wafers, substrates or parts of devices
- H10P 72/7402: {Wafer tapes, e.g. grinding or dicing support tapes}
- H10P 72/7416: {used during dicing or grinding}
- H10P 72/7422: {used to protect an active side of a device or wafer}
- H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor substrate contains a plurality of openings extending partially into a surface of the semiconductor substrate. A conductive layer is formed with a first portion of the conductive layer over a remaining portion of the surface of the semiconductor substrate between the openings and a second portion of the conductive layer in the openings. The remaining portion of the surface of the semiconductor substrate is removed to lift-off the first portion of the conductive layer while leaving the second portion of the conductive layer in the openings. The semiconductor substrate is singulated to separate the semiconductor die leaving the second portion of the conductive layer over a surface of the semiconductor die. Alternatively, a plurality of openings is formed over each semiconductor die. A conductive layer is formed over a remaining portion of the surface of the semiconductor substrate between the openings and into the openings.

## Claims

### Claim 1

A semiconductor device, comprising:
a semiconductor substrate including a plurality of semiconductor die;
a plurality of openings formed over each semiconductor die and extending partially into a surface of the semiconductor substrate; and
a conductive layer formed over a remaining portion of the surface of the semiconductor substrate between the openings and into the openings.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the plurality of openings formed over each semiconductor die is disposed in multiple offset rows.

### Claim 3 (depends on 2)

The semiconductor device of claim 2, wherein a boundary of the multiple offset rows over each semiconductor die corresponds to a boundary of a respective semiconductor die.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the remaining portion of the surface includes a honeycomb pattern defining the plurality of openings as hexagonally shaped.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the plurality of openings is limited to within a footprint of the plurality of semiconductor die.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein a thickness of the conductive layer is less than 1.5 micrometers.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein the semiconductor substrate includes a support ring formed around a perimeter of the semiconductor substrate.

### Claim 8

A semiconductor device, comprising:
a semiconductor substrate including a semiconductor die formed in the semiconductor substrate;
a plurality of openings formed in a surface of the semiconductor substrate over the semiconductor die; and
a conductive layer formed over the surface of the semiconductor substrate between the respective openings of the plurality of openings.

### Claim 9 (depends on 8)

The semiconductor device of claim 8, wherein the plurality of openings is disposed in multiple offset rows.

### Claim 10 (depends on 8)

The semiconductor device of claim 8, wherein the conductive layer extends into each of the plurality of openings.

### Claim 11 (depends on 8)

The semiconductor device of claim 8, wherein each of the plurality of openings is hexagonally shaped to define a honeycomb pattern.

### Claim 12 (depends on 8)

The semiconductor device of claim 8, wherein the plurality of openings is limited to within a footprint of the semiconductor die.

### Claim 13 (depends on 8)

The semiconductor device of claim 8, wherein a thickness of the conductive layer is less than 1.5 micrometers.

### Claim 14 (depends on 8)

The semiconductor device of claim 8, further including a portion of the surface surrounding the semiconductor die and devoid of the plurality of openings.

### Claim 15

A semiconductor device, comprising:
a semiconductor substrate including a semiconductor die formed in the semiconductor substrate; and
a plurality of openings formed in a surface of the semiconductor substrate over the semiconductor die.

### Claim 16 (depends on 15)

The semiconductor device of claim 15, further including a conductive layer formed over the surface of the semiconductor die.

### Claim 17 (depends on 16)

The semiconductor device of claim 16, wherein the conductive layer blankets the semiconductor substrate.

### Claim 18 (depends on 16)

The semiconductor device of claim 16, further including a contact pad formed over the semiconductor die opposite the conductive layer.

### Claim 19 (depends on 15)

The semiconductor device of claim 15, wherein the plurality of openings is formed in a honeycomb pattern.

### Claim 20 (depends on 19)

The semiconductor device of claim 19, wherein the honeycomb pattern is confined to a footprint of the semiconductor die.