# US 2018/0323150 A1 · Multi-Stacked Package-on-Package Structures

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- Number: US 2018/0323150 A1
- Document ID: US20180323150A1
- Status: Published application
- Kind: A1
- Application number: 16/023,705
- Filed: 2018-06-29
- Published: 2018-11-08
- Earliest claimed: 2017-02-08
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Chen-Hua Yu; An-Jhih Su; Chi-Hsi Wu; Der-Chyang Yeh; Ming Shih Yeh; Wei-Cheng Wu
- Web page: https://patentgrep.com/patent/US20180323150A1

## CPC

- H10W 70/614: {the multiple chips being integrally enclosed}
- H10P 72/74: {using temporarily an auxiliary support}
- H10P 72/7448: {the bond interface between the auxiliary support and the wafer comprising two or more, e.g. multilayer adhesive or adhesive and release layer}
- H10P 95/062: {involving a dielectric removal step}
- H10W 20/081: {by forming openings in the dielectric parts}
- H10W 70/09: extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/611: {for connecting multiple chips together}
- H10W 74/01: Manufacture or treatment
- H10W 74/014: {using batch processing}
- H10W 74/016: {using moulds}
- H10W 74/019: {using temporary auxiliary substrates (H10W74/017 takes precedence)}
- H10W 90/00: Package configurations
- H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs}
- H10P 72/7412: {the auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support}
- H10P 72/743: {used as a support during manufacture of interconnect decals or build up layers}
- H10P 72/7436: {used to support a device or a wafer when forming electrical connections thereto}
- H10P 72/744: {Details of chemical or physical process used for separating the auxiliary support from a device or a wafer}
- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 70/685: comprising multiple insulating layers
- H10W 72/072: {of bump connectors}
- H10W 72/07207: {Temporary substrates, e.g. removable substrates}
- H10W 72/07236: {Soldering or alloying}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07307: {the auxiliary member being a temporary substrate, e.g. a removable substrate}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/874: {On different surfaces}
- H10W 72/926: {Multiple bond pads having different sizes}
- H10W 72/9413: {on encapsulations}
- H10W 72/944: {Dispositions of multiple bond pads}
- H10W 74/117: {the substrate having spherical bumps for external connection}
- H10W 74/142: {the encapsulations exposing the passive side of the semiconductor body}
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/10: Configurations of laterally-adjacent chips
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/728: {between a chip and a stacked discrete passive device, e.g. resistors, capacitors or inductors}
- H10W 90/732: {between stacked chips}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A multi-stacked package-on-package structure includes a method. The method includes: adhering a first die and a plurality of second dies to a substrate, the first die having a different function from each of the plurality of second dies; attaching a passive device over the first die; encapsulating the first die, the plurality of second dies, and the passive device; and forming a first redistribution structure over the passive device, the first die, and the plurality of second dies, the passive device connecting the first die to the first redistribution structure.

## Claims

### Claim 1

A device comprising:
a first die;
a second die having a different function than the first die;
a passive device over the second die;
a first encapsulant around the passive device; and
a first redistribution structure over the passive device, the first die, and the second die, the passive device electrically connecting the second die to a redistribution line of the first redistribution structure.

### Claim 2 (depends on 1)

The device of claim 1 further comprising:
a second redistribution structure over the first die and the second die, the passive device being interposed between the second redistribution structure.

### Claim 3 (depends on 2)

The device of claim 2, wherein the passive device is physically and electrically connected to the second redistribution structure with solder connections.

### Claim 4 (depends on 2)

The device of claim 2 further comprising:
a second encapsulant around the first die and the second die, the second redistribution structure physically separating the first encapsulant from the second encapsulant.

### Claim 5 (depends on 4)

The device of claim 4 further comprising:
a plurality of conductive vias extending through the second encapsulant, the conductive vias electrically connecting the second redistribution structure to the first redistribution structure.

### Claim 6 (depends on 5)

The device of claim 5, wherein top surfaces of the first encapsulant, the conductive vias, and the passive device are planar.

### Claim 7 (depends on 4)

The device of claim 4, wherein top surfaces of the second encapsulant, the first die, and the second die are planar.

### Claim 8 (depends on 1)

The device of claim 1, wherein the passive device is physically and electrically connected to the second die with solder connections.

### Claim 9 (depends on 8)

The device of claim 8, wherein the first redistribution structure is further disposed over the first die and the second die.

### Claim 10 (depends on 8)

The device of claim 8, wherein the first encapsulant further surrounds the first die and the second die.

### Claim 11 (depends on 10)

The device of claim 10, wherein top surfaces of the first encapsulant, the first die, and the passive device are planar.

### Claim 12

A device comprising:
a first die;
a second die having a different function than the first die;
a first encapsulant surrounding the first die and the second die;
a first redistribution structure over the first encapsulant, the first redistribution structure being electrically connected to the second die and the first die;
a plurality of conductive vias in electrical connection with the first redistribution structure;
a passive device attached to the first redistribution structure with conductive connections, the passive device being adjacent the conductive vias; and
a second redistribution structure over the passive device, the second redistribution structure being electrically connected to the conductive vias and the passive device.

### Claim 13 (depends on 12)

The device of claim 12, wherein the passive device comprises:
a substrate, the substrate being free of active device regions; and
a plurality of through silicon vias (TSVs) extending through the substrate, the TSVs being electrically connected to the conductive connections and the second redistribution structure.

### Claim 14 (depends on 12)

The device of claim 12 further comprising:
a second encapsulant surrounding the conductive vias and the passive device, top surfaces of the second encapsulant, the conductive vias, and the passive device being planar.

### Claim 15 (depends on 14)

The device of claim 14, wherein the second encapsulant is disposed between the passive device and the first redistribution structure, the second encapsulant surrounding the conductive connections.

### Claim 16 (depends on 14)

The device of claim 14 further comprising:
an underfill disposed between the passive device and the first redistribution structure, the underfill surrounding the conductive connections, the underfill being different from the second encapsulant.

### Claim 17

A device comprising:
a first die;
a second die having a different function than the first die;
a passive device attached to the second die with conductive connections;
an encapsulant surrounding the passive device, the first die, and the second die; and
a redistribution structure over the encapsulant, the passive device, the first die, and the second die, the passive device electrically connecting the second die to a redistribution line of the redistribution structure.

### Claim 18 (depends on 17)

The device of claim 17, wherein the passive device comprises:
a substrate, the substrate being free of active device regions; and
a plurality of through silicon vias (TSVs) extending through the substrate, the TSVs being electrically connected to the conductive connections and the redistribution structure.

### Claim 19 (depends on 17)

The device of claim 17, wherein the encapsulant is disposed between the passive device and the second die, the encapsulant surrounding the conductive connections.

### Claim 20 (depends on 17)

The device of claim 17 further comprising:
an underfill disposed between the passive device and the second die, the underfill surrounding the conductive connections, the underfill being different from the encapsulant.