# US 2018/0323145 A1 · 3d interconnect multi-die inductors with through-substrate via cores

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- Number: US 2018/0323145 A1
- Document ID: US20180323145A1
- Status: Published application
- Kind: A1
- Application number: 15/584,965
- Filed: 2017-05-02
- Published: 2018-11-08
- Earliest claimed: 2017-05-02
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Kyle K. Kirby
- Web page: https://patentgrep.com/patent/US20180323145A1

## CPC

- H10W 20/497: {Inductive arrangements or effects of, or between, wiring layers}
- H01F 17/0033: {with the coil helically wound around a magnetic core}
- H10W 20/0249: {wherein the through-semiconductor via protrudes from backsides of the chips, wafers or substrates during the manufacture}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 20/2134: {TSVs extending from the semiconductor wafer into back-end-of-line layers}
- H10W 90/00: Package configurations
- H01F 17/06: with core substantially closed in itself, e.g. toroid
- H01F 2017/0086: {on semiconductor substrate}
- H10W 44/501: {Inductive arrangements (H10W44/20 takes precedence)}
- H10W 72/01: {Manufacture or treatment}
- H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H01F: MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES

## Abstract

A semiconductor device having a first die and a second die is provided. The first die of the device includes a first surface and a through-substrate via (TSV) extending at least substantially through the first die, the TSV having a portion extending past the first surface. The first die further includes a first substantially helical conductor disposed around the TSV. The second die of the device includes a second surface, an opening in the second surface in which the portion of the TSV is disposed, and a second substantially helical conductor disposed around the opening.

## Claims

### Claim 1

A semiconductor device, comprising:
a first die including:
a first surface,
a through-substrate via (TSV) extending at least substantially through the first die, the TSV having a portion extending past the first surface, and
a first substantially helical conductor disposed around the TSV; and
a second die including:
a second surface,
an opening in the second surface in which the portion of the TSV is disposed, and
a second substantially helical conductor disposed around the opening.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the first substantially helical conductor is configured to induce a change in a magnetic field in the TSV in response to a first changing current in the first substantially helical conductor, and wherein the second substantially helical conductor is configured to have a second changing current induced therein in response to the change in the magnetic field in the portion of TSV.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the first die further includes:
a second TSV extending at least substantially through the first die, the second TSV having a portion extending past the first surface, and
a third substantially helical conductor disposed around the second TSV, and
wherein the second die further includes:
a second opening in the second surface in which the portion of the second TSV is disposed, and
a fourth substantially helical conductor disposed around the second opening.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the TSV comprises a ferromagnetic or a ferrimagnetic material.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the first substantially helical conductor comprises a different number of turns around the TSV than the second substantially helical conductor.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein the first and second substantially helical conductors comprise a same number of turns around the TSV.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein the first and second substantially helical conductors are coaxially aligned with the TSV.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, wherein the first substantially helical conductor comprises more than one turn around the TSV, and the second substantially helical conductor comprises more than one turn around the TSV.

### Claim 9 (depends on 1)

The semiconductor device of claim 1, wherein the first substantially helical conductor and the second substantially helical conductor are electrically isolated from each other and from the TSV.

### Claim 10 (depends on 1)

The semiconductor device of claim 1, wherein one of the first and second substantially helical conductors is electrically connected to a power supply and another of the first and second substantially helical conductors is electrically connected to a load.

### Claim 11 (depends on 1)

The semiconductor device of claim 1, wherein the first surface is a lower surface of a substrate material of the first die.

### Claim 12 (depends on 1)

The semiconductor device of claim 1, wherein the first surface is an upper surface of the first die on an opposite side of the first substantially helical conductor from a substrate material of the first die.

### Claim at position 13

-26. (canceled)