# US 2018/0323138 A1 · Redundant through-hole interconnect structures

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- Number: US 2018/0323138 A1
- Document ID: US20180323138A1
- Status: Published application
- Kind: A1
- Application number: 15/772,682
- Filed: 2015-12-23
- Published: 2018-11-08
- Earliest claimed: 2015-12-23
- Assignees: Intel Corporation
- Applicants: Intel Corporation
- Inventors: Amanda E. SCHUCKMAN; Sri Ranga Sai BOYAPATI; Maroun D. MOUSSALLEM
- Web page: https://patentgrep.com/patent/US20180323138A1

## CPC

- H10W 70/635: {Through-vias}
- H10W 70/095: {of vias therein}
- H10W 70/685: comprising multiple insulating layers
- H10W 70/69: Insulating materials thereof
- H10W 72/072: {of bump connectors}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Techniques and mechanisms for efficiently providing reliable connection through a substrate such as that of a core of a packaged integrated circuit device. In an embodiment, a substrate has formed therein a through-hole interconnects, wherein an insulator is disposed between the through-hole interconnects in the substrate. A redundant configuration of the through-hole interconnects with respect to each other allows for a higher tolerance of voids being formed in the through-hole interconnects. In another embodiment, the through-hole interconnects are shorted together at one side of the substrate, and are further shorted together at an opposite side of the substrate. A total volume of any voids formed by one of the through-hole interconnects is equal to or more than six thousand cubic micrometers.

## Claims

### Claim at position 1

-25. (canceled)

### Claim 26

A device comprising:
a core including a substrate having formed therein a first through-hole and a second through-hole each extending from a first side of the substrate to a second side of the substrate, wherein an insulator is disposed between the first through-hole and the second through-hole in the substrate;
a first through-hole interconnect disposed in the first through-hole;
a second through-hole interconnect disposed in the second through-hole;
a first interconnect structure to provide a short between the first through-hole interconnect and the second through-hole interconnect at the first side; and
a second interconnect structure to provide a short between the first through-hole interconnect and the second through-hole interconnect at the second side;
wherein a total volume of the first through-hole is equal to or less than twenty million (20·106) cubic micrometers (μm3), and wherein a total volume of any voids formed by the first through-hole interconnect is equal to or more than 6·103 μm3.

### Claim 27 (depends on 26)

The device of claim 26, wherein the total volume of the first through-hole is equal to or less than thirteen million (13·106) μm3.

### Claim 28 (depends on 27)

The device of claim 27, wherein the total volume of the first through-hole is equal to or less than three and a half million (3.5·106) μm3.

### Claim 29 (depends on 26)

The device of claim 26, wherein a total volume of the second through-hole is equal to or less than twenty million (20·106) μm3.

### Claim 30 (depends on 26)

The device of claim 26, wherein a thickness of the substrate between the first side and the second side is equal to or less than 400 μm.

### Claim 31 (depends on 26)

The device of claim 26, wherein a width of the first through-hole is equal to or less than 200 μm.

### Claim 32 (depends on 31)

The device of claim 31, wherein the width of the first through-hole is equal to or less than 100 μm.

### Claim 33 (depends on 26)

The device of claim 26, wherein a total volume of any voids formed by the first through-hole interconnect is equal to or more than 9·103 μm3.

### Claim 34 (depends on 26)

The device of claim 26, wherein the total volume of any voids formed by the first through-hole interconnect is in a range between 9·103 μm3 and 17·103 μm3.

### Claim 35 (depends on 26)

The device of claim 26, wherein a total volume of any voids formed by the second through-hole interconnect is equal to or more than 6·103 μm3.

### Claim 36 (depends on 26)

The device of claim 26, the substrate having further formed therein a third through-hole extending from the first side to the second side, the device further comprising:
a third through-hole interconnect disposed in the third through-hole;
wherein the first interconnect structure further provides a short between the third through-hole interconnect and one of the first through-hole interconnect and the second through-hole interconnect; and
wherein the second interconnect structure further provides a short between the third through-hole interconnect and one of the first through-hole interconnect and the second through-hole interconnect.

### Claim 37 (depends on 26)

The device of claim 26, wherein a first redundant through-hole interconnect pair of the device is configured to receive a first signal of a differential signal pair, the first redundant through-hole interconnect pair including the first through-hole interconnect and the second through-hole interconnect aligned with each other along a first line of direction, the device further comprising a second redundant through-hole interconnect pair aligned with each other in parallel with the first line of direction, the second redundant through-hole interconnect pair configured to receive a second signal of the differential signal pair.

### Claim 38 (depends on 26)

The device of claim 26, further comprising a build-up layer disposed on the first side of the substrate.

### Claim 39

A method comprising:
forming a first through-hole and a second through-hole each extending from a first side of a substrate to a second side of the substrate, wherein an insulator is disposed between the first through-hole and the second through-hole in the substrate;
depositing a first conductor in the first through-hole;
depositing a second conductor in the second through-hole;
forming a first short between the first conductor and the second conductor at the first side; and
forming a second short between the first conductor and the second conductor at the second side;
wherein a total volume of the first through-hole is equal to or less than twenty million (20·106) cubic micrometers (μm3), and wherein a total volume of any voids formed by the first through-hole interconnect is equal to or more than 6·103 μm3.

### Claim 40 (depends on 39)

The method of claim 39, wherein the total volume of the first through-hole is equal to or less than thirteen million (13·106) μm3.

### Claim 41 (depends on 40)

The method of claim 40, wherein the total volume of the first through-hole is equal to or less than three and a half million (3.5·106) μm3.

### Claim 42 (depends on 39)

The method of claim 39, wherein a total volume of the second through-hole is equal to or less than twenty million (20·106) μm3.

### Claim 43 (depends on 39)

The method of claim 39, wherein a thickness of the substrate between the first side and the second side is equal to or less than 400 μm.

### Claim 44

A system comprising:
a packaged device including:
one or more integrated circuit (IC) chips;
a core including a substrate coupled to the one or more IC chips, the having formed therein a first through-hole and a second through-hole each extending from a first side of the substrate to a second side of the substrate, wherein an insulator is disposed between the first through-hole and the second through-hole in the substrate;
a first through-hole interconnect disposed in the first through-hole;
a second through-hole interconnect disposed in the second through-hole;
a first interconnect structure to provide a short between the first through-hole interconnect and the second through-hole interconnect at the first side; and
a second interconnect structure to provide a short between the first through-hole interconnect and the second through-hole interconnect at the second side;
wherein a total volume of the first through-hole is equal to or less than twenty million (20·106) cubic micrometers (μm3), and wherein a total volume of any voids formed by the first through-hole interconnect is equal to or more than 6·103 μm3; and
a display device coupled to the packaged device, the display device to display an image based on signals exchanged with the one or more IC chips.

### Claim 45 (depends on 44)

The system of claim 44, wherein the total volume of the first through-hole is equal to or less than thirteen million (13·106) μm3.

### Claim 46 (depends on 44)

The system of claim 44, wherein a total volume of the second through-hole is equal to or less than twenty million (20·106) μm3.

### Claim 47 (depends on 44)

The system of claim 44, wherein the total volume of any voids formed by the first through-hole interconnect is in a range between 9·103 μm3 and 17·103 μm3.

### Claim 48 (depends on 44)

The system of claim 44, wherein a total volume of any voids formed by the second through-hole interconnect is equal to or more than 6·103 μm3.
