# US 2018/0323137 A1 · Integrated circuit (ic) package and package substrate comprising stacked vias > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0323137 A1 - Document ID: US20180323137A1 - Status: Published application - Kind: A1 - Application number: 15/678,698 - Filed: 2017-08-16 - Published: 2018-11-08 - Earliest claimed: 2017-05-05 - Assignees: QUALCOMM Incorporated - Applicants: QUALCOMM Incorporated - Inventors: Kuiwon KANG; Houssam JOMAA; Layal ROUHANA; Seongryul CHOI - Web page: https://patentgrep.com/patent/US20180323137A1 ## CPC - H10W 70/635: {Through-vias} - H10P 72/74: {using temporarily an auxiliary support} - H10W 20/023: {the interconnections being through-semiconductor vias} - H10W 70/05: of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) - H10W 70/611: {for connecting multiple chips together} - H10W 70/65: Shapes or dispositions of interconnections - H10W 70/685: comprising multiple insulating layers - H10W 74/014: {using batch processing} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10P 72/7424: {used as a support during the manufacture of self-supporting substrates} - H10W 70/095: {of vias therein} - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 74/117: {the substrate having spherical bumps for external connection} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract A device comprising a semiconductor die, a package substrate coupled to the semiconductor die, and an encapsulation layer that at least partially encapsulates the semiconductor die. The package substrate includes at least one stacked via. The at least one stacked via includes a first via and a second via coupled to the first via. The second via includes a seed layer coupled to the first via. The second via includes a different shape than the first via. The package substrate includes a prepreg layer. The package substrate includes a first pad coupled to the first via, and a second pad coupled to the second via. ## Claims ### Claim 1 A device comprising: a semiconductor die; a package substrate coupled to the semiconductor die, the package substrate including at least one stacked via, the at least one stacked via including: a first via; and a second via including a metal layer and a seed layer, the metal layer coupled to the seed layer, the seed layer coupled to the first via such that the seed layer is located between the first via and the metal layer of the second via, the second via including a different shape than the first via; and an encapsulation layer that at least partially encapsulates the semiconductor die. ### Claim 2 (depends on 1) The device of claim 1, wherein the first via and the second via are formed in a single dielectric layer. ### Claim 3 (depends on 1) The device of claim 1, wherein the package substrate further comprises: a first pad coupled to the first via; and a second pad coupled to the second via. ### Claim 4 (depends on 3) The device of claim 3, wherein the second via and the second pad are one contiguous interconnect. ### Claim 5 (depends on 3) The device of claim 3, wherein a first surface of the second pad includes a dimple. ### Claim 6 (depends on 3) The device of claim 3, wherein the first pad comprises a width in a range of about 100-115 micrometers (μm). ### Claim 7 (depends on 1) The device of claim 1, wherein the at least one stacked via comprises a width in a range of about 70-80 micrometers (μm). ### Claim 8 (depends on 1) The device of claim 1, wherein package substrate includes a plurality interconnects that comprises a line and spacing (L/S) in a range of about 5/5 micrometers (μm) and about 12/12 micrometers (μm). ### Claim 9 (depends on 1) The device of claim 1, wherein the package substrate comprises a thickness that is in a range of about 60-100 micrometers (μm), and the at least one stacked via comprises a height that is about 50-80 micrometers (μm). ### Claim 10 (depends on 1) The device of claim 1, wherein the device is incorporated into a device selected from a group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, and a device in an automotive vehicle, and further including the device. ### Claim 11 An apparatus comprising: a semiconductor die; a package substrate coupled to the semiconductor die, the package substrate including means for interconnect, the means for interconnect including: a first via; and a second via including a metal layer and a seed layer, the metal layer coupled to the seed layer, the seed layer coupled to the first via such that the seed layer is located between the first via and the metal layer of the second via, the second via including a different shape than the first via; and an encapsulation layer that at least partially encapsulates the semiconductor die. ### Claim 12 (depends on 11) The apparatus of claim 11, wherein the first via and the second via are formed in a single dielectric layer. ### Claim 13 (depends on 11) The apparatus of claim 11, wherein the package substrate further comprises: a first pad coupled to the first via; and a second pad coupled to the second via. ### Claim 14 (depends on 13) The apparatus of claim 13, wherein the first pad comprises a width in a range of about 100-115 micrometers (μm). ### Claim 15 (depends on 11) The apparatus of claim 11, wherein the means for interconnect comprises a width in a range of about 70-80 micrometers (μm). ### Claim 16 (depends on 11) The apparatus of claim 11, wherein package substrate includes a plurality interconnects that comprises a line and spacing (L/S) in a range of about 5/5 micrometers (μm) and about 12/12 micrometers (μm). ### Claim 17 (depends on 11) The apparatus of claim 11, wherein the package substrate comprises a thickness that is in a range of about 60-100 micrometers (μm). ### Claim 18 (depends on 11) The apparatus of claim 11, wherein the means for interconnect comprises a height that is about 50-80 micrometers (μm). ### Claim 19 (depends on 11) The apparatus of claim 11, wherein the package substrate comprises at least one dielectric layer, and wherein the means for interconnect traverses the at least one dielectric layer. ### Claim 20 (depends on 11) The apparatus of claim 11, wherein the apparatus is incorporated into a device selected from a group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, and a device in an automotive vehicle, and further including the apparatus. ### Claim 21 A method for fabricating a device, comprising: providing a semiconductor die; coupling a package substrate to the semiconductor die, the package substrate including at least one stacked via, the at least one stacked via including: a first via; and a second via including a metal layer and a seed layer, the metal layer coupled to the seed layer, the seed layer coupled to the first via such that the seed layer is located between the first via and the metal layer of the second via, the second via including a different shape than the first via; and forming an encapsulation layer that at least partially encapsulates the semiconductor die. ### Claim 22 (depends on 21) The method of claim 21, wherein the first via and the second via are formed in a single dielectric layer. ### Claim 23 (depends on 21) The method of claim 21, wherein the package substrate further comprises: a first pad coupled to the first via; and a second pad coupled to the second via. ### Claim 24 (depends on 23) The method of claim 23, wherein the first pad comprises a width in a range of about 100-115 micrometers (μm). ### Claim 25 (depends on 21) The method of claim 21, wherein the at least one stacked via comprises a width in a range of about 70-80 micrometers (μm). ### Claim 26 (depends on 21) The method of claim 21, wherein package substrate includes a plurality interconnects that comprises a line and spacing (L/S) in a range of about 5/5 micrometers (μm) and about 12/12 micrometers (μm). ### Claim 27 (depends on 21) The method of claim 21, wherein the package substrate comprises a thickness that is in a range of about 60-100 micrometers (μm). ### Claim 28 (depends on 21) The method of claim 21, wherein the at least one stacked via comprises a height that is about 50-80 micrometers (μm). ### Claim 29 (depends on 21) The method of claim 21, wherein the seed layer surrounds the side walls of the metal layer of second via. ### Claim 30 (depends on 21) The method of claim 21, wherein the device is incorporated into a device selected from a group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, and a device in an automotive vehicle, and further including the device. ### Claim 31 (depends on 1) The device of claim 1, wherein the first via is free of a seed layer.