# US 2018/0322841 A1 · Shift register circuit and display panel using same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0322841 A1 - Document ID: US20180322841A1 - Status: Published application - Kind: A1 - Application number: 15/556,093 - Filed: 2017-05-17 - Published: 2018-11-08 - Earliest claimed: 2017-05-05 - Assignees: Chongqing Hkc Optoelectronics Technology Co., Ltd. - Applicants: Chongqing HKC Optoelectronics Technology Co., Ltd. - Inventors: Yu-Jen CHEN - Web page: https://patentgrep.com/patent/US20180322841A1 ## CPC - G09G 3/3677: {suitable for active matrices only} - G02F 1/133528: {Polarisers} - G11C 19/28: using semiconductor elements (G11C19/14, G11C19/36 take precedence) - G11C 19/287: {Organisation of a multiplicity of shift registers} - G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A shift register circuit includes shift registers and each including: a first through fourth switches: in the first switch: a control end electrically coupled to a first node, a first end electrically coupled to a frequency signal, and a second end electrically coupled to an output pulse signal; in the second switch: a control end electrically coupled to the first node, a first end of electrically coupled to the frequency signal, and a second end electrically coupled to a control signal; in the third switch: a control end electrically coupled to a control signal, a first end electrically coupled to a first direct-current signal, and a second end electrically coupled to the first node; in the fourth switch: a control end electrically coupled to the control signal, a first end electrically coupled to a second direct-current signal, and a second end electrically coupled to the first node. ## Claims ### Claim 1 A shift register circuit, comprising a plurality of shift registers, wherein each shift register comprises: a first switch, wherein a control end of the first switch is electrically coupled to a first node, a first end of the first switch is electrically coupled to a frequency signal, and a second end of the first switch is electrically coupled to an output pulse signal; a second switch, wherein a control end of the second switch is electrically coupled to the first node, a first end of the second switch is electrically coupled to the frequency signal, and a second end of the second switch is electrically coupled to a control signal; a third switch, wherein a control end of the third switch is electrically coupled to a control signal, a first end of the third switch is electrically coupled to a first direct-current signal, and a second end of the third switch is electrically coupled to the first node; and a fourth switch, wherein a control end of the fourth switch is electrically coupled to the control signal, a first end of the fourth switch is electrically coupled to a second direct-current signal, and a second end of the fourth switch is electrically coupled to the first node. ### Claim 2 (depends on 1) The shift register circuit according to claim 1, further comprising a fifth switch, wherein a control end of the fifth switch is electrically coupled to a second node, a first end of the fifth switch is electrically coupled to the output pulse signal, and a second end of the fifth switch is electrically coupled to a preset low potential. ### Claim 3 (depends on 1) The shift register circuit according to claim 1, further comprising a sixth switch, wherein a control end of the sixth switch is electrically coupled to a second node, a first end of the sixth switch is electrically coupled to the first node, and a second end of the sixth switch is electrically coupled to a preset low potential. ### Claim 4 (depends on 1) The shift register circuit according to claim 1, further comprising a pull-down subcircuit electrically coupled to the first node, the output pulse signal, and a default low potential of the shift register circuit. ### Claim 5 (depends on 4) The shift register circuit according to claim 4, further comprising a pull-down subcircuit controller electrically coupled to the default low potential and the pull-down subcircuit of the shift register circuit. ### Claim 6 (depends on 1) The shift register circuit according to claim 1, wherein the first end of the third switch is electrically coupled to the first direct-current signal, to provide a power supply to precharge the shift register circuit. ### Claim 7 (depends on 6) The shift register circuit according to claim 6, wherein the first direct-current signal is used to increase a potential of the control end of the third switch. ### Claim 8 (depends on 1) The shift register circuit according to claim 1, wherein the first end of the fourth switch is electrically coupled to the second direct-current signal, to provide a power supply to precharge the shift register circuit. ### Claim 9 (depends on 8) The shift register circuit according to claim 8, wherein the second direct-current signal is used to increase a potential of the control end of the fourth switch. ### Claim 10 (depends on 1) The shift register circuit according to claim 1, wherein the first direct-current signal and the second direct-current signal take turns to provide a power supply to precharge the shift register circuit. ### Claim 11 A liquid crystal display panel, comprising: a first substrate; a second substrate, disposed opposite the first substrate; a liquid crystal layer, disposed between the first substrate and the second substrate; a first polarizer, disposed on an outer surface of the first substrate; and a second polarizer, disposed on an outer surface of the second substrate, wherein a polarizing direction of the first polarizer and a polarizing direction of the second polarizer are in parallel to each other; and a shift register circuit, disposed on the first substrate or the second substrate. ### Claim 12 (depends on 11) The liquid crystal display panel according to claim 11, wherein the shift register circuit comprises a plurality of shift registers, and each shift register comprises: a first switch, wherein a control end of the first switch is electrically coupled to a first node, a first end of the first switch is electrically coupled to a frequency signal, and a second end of the first switch is electrically coupled to an output pulse signal; a second switch, wherein a control end of the second switch is electrically coupled to the first node, a first end of the second switch is electrically coupled to the frequency signal, and a second end of the second switch is electrically coupled to a control signal; a third switch, wherein a control end of the third switch is electrically coupled to a control signal, a first end of the third switch is electrically coupled to a first direct-current signal, and a second end of the third switch is electrically coupled to the first node; and a fourth switch, wherein a control end of the fourth switch is electrically coupled to the control signal, a first end of the fourth switch is electrically coupled to a second direct-current signal, and a second end of the fourth switch is electrically coupled to the first node. ### Claim 13 (depends on 12) The liquid crystal display panel according to claim 12, further comprising a fifth switch, wherein a control end of the fifth switch is electrically coupled to a second node, a first end of the fifth switch is electrically coupled to the output pulse signal, and a second end of the fifth switch is electrically coupled to a preset low potential. ### Claim 14 (depends on 12) The liquid crystal display panel according to claim 12, further comprising a sixth switch, wherein a control end of the sixth switch is electrically coupled to a second node, a first end of the sixth switch is electrically coupled to the first node, and a second end of the sixth switch is electrically coupled to a preset low potential. ### Claim 15 (depends on 12) The liquid crystal display panel according to claim 12, further comprising a pull-down subcircuit electrically coupled to the first node, the output pulse signal, and a default low potential of the shift register circuit. ### Claim 16 (depends on 15) The liquid crystal display panel according to claim 15, further comprising a pull-down subcircuit controller electrically coupled to the default low potential and the pull-down subcircuit of the shift register circuit.