# US 2018/0322010 A1 · Semiconductor device and control method thereof for processing > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0322010 A1 - Document ID: US20180322010A1 - Status: Published application - Kind: A1 - Application number: 16/035,055 - Filed: 2018-07-13 - Published: 2018-11-08 - Earliest claimed: 2015-06-19 - Assignees: Renesas Electronics Corporation - Applicants: Renesas Electronics Corporation - Inventors: Yoshitaka IZAWA; Katsumi TOGAWA; Takao TOI; Taro FUJII - Web page: https://patentgrep.com/patent/US20180322010A1 ## CPC - G06F 11/142: {Reconfiguring to eliminate the error (group management mechanisms in a peer-to-peer network H04L67/1044)} - G06F 11/00: Error detection; Error correction; Monitoring (error detection, correction or monitoring in information storage based on relative movement between record carrier and transducer G11B20/18; monitoring, i.e. supervising the progress of recording or reproducing G11B27/36; in static stores G11C29/00) - G06F 11/14: Error detection or correction of the data by redundancy in operations (error detection or correction of the data by redundancy in hardware G06F11/16) - G06F 11/20: using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements - G06F 11/202: {where processing functionality is redundant (redundant communication control functionality G06F11/2005, redundant storage control functionality G06F11/2089)} - G06F 11/2028: {eliminating a faulty processor or activating a spare} - G06F 11/2035: {without idle spare hardware} - G06F 2201/805: Real-time - G06F 2201/85: Active fault masking without idle spares - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A semiconductor device and method includes a configuration information storage memory that stores a plurality of configuration information items, a state transition management unit that selects any one of the plurality of configuration information items, and a data path unit that dynamically reconfigures a circuit according to the configuration information item selected by the state transition management unit. When a detection of a failure or no failure is made in any one of a plurality of logic circuit groups provided in the data path unit, the state transition management unit selects the configuration information item depending on a result of the detection. ## Claims ### Claim 1 A semiconductor device comprising: a configuration information storage memory that stores a plurality of configuration information items; a state transition management unit that selects any one of the plurality of configuration information items; and a data path unit that dynamically reconfigures a circuit according to the configuration information item selected by the state transition management unit, wherein when a detection of a failure or no failure is made in any one of a plurality of logic circuit groups provided in the data path unit, the state transition management unit selects the configuration information item depending on a result of the detection. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein when a failure is not detected in any one of a plurality of logic circuit groups provided in the data path unit, the state transition management unit selects the configuration information item so that a first processing circuit is configured using some or all of the plurality of logic circuit groups. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein when a failure is detected in any one of the plurality of logic circuit groups, the state transition management unit selects the configuration information item so that a first intermediate processing circuit is configured using some or all of logical circuit groups in which no failure is detected from among the plurality of logic circuit groups, and then a second intermediate processing circuit is configured using some or all of the logical circuit groups in which no failure is detected from among the plurality of logic circuit groups, in order to achieve the first processing circuit. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein the state transition management unit selects the configuration information item so that the second intermediate processing circuit is configured after a process completion signal indicating a completion of processing by the first intermediate processing circuit becomes active. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein an address path is provided between the state transition management unit and the configuration information storage memory, and wherein a configuration information path is provided between the configuration information storage memory and the data path unit. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein the data path comprises a processor that dynamically reconfigures a circuit or plurality of circuits according to the configuration information item supplied from outside of the semiconductor device, and performs processing using a reconfigured circuit on input data, and outputs obtained output data. ### Claim 7 (depends on 1) The semiconductor device according to claim 1, wherein the data path unit activates a process completion signal including switching a level of the process completion signal when the process is completed, and activates a failure detection signal by switching a level of the failure detection signal when a failure is detected. ### Claim 8 A semiconductor device comprising: a configuration information storage memory that stores a plurality of configuration information items; a processor accessing the configuration information storage memory and configured to: select any one of the plurality of configuration information items; and dynamically reconfigures a circuit according to the configuration information item selected, wherein when a detection of a failure or no failure is made in any one of a plurality of logic circuit groups, the processor selects the configuration information item depending on a result of the detection. ### Claim 9 (depends on 8) The semiconductor device according to claim 8, wherein when a failure is not detected in any one of a plurality of logic circuit groups, the processor selects the configuration information item so that a first processing circuit is configured using some or all of the plurality of logic circuit groups. ### Claim 10 (depends on 8) The semiconductor device according to claim 8, wherein when a failure is detected in any one of the plurality of logic circuit groups, the processor selects the configuration information item so that a first intermediate processing circuit is configured using some or all of logical circuit groups in which no failure is detected from among the plurality of logic circuit groups, and then a second intermediate processing circuit is configured using some or all of the logical circuit groups in which no failure is detected from among the plurality of logic circuit groups, in order to achieve the first processing circuit. ### Claim 11 (depends on 8) The semiconductor device according to claim 8, wherein the processor selects the configuration information item so that the second intermediate processing circuit is configured after a process completion signal indicating a completion of processing by the first intermediate processing circuit becomes active. ### Claim 12 (depends on 8) The semiconductor device according to claim 8, wherein an address path is provided between the processor and the configuration information storage memory, and wherein a configuration information path is provided between the configuration information storage memory and the processor. ### Claim 13 (depends on 8) The semiconductor device according to claim 8, wherein the processor dynamically reconfigures a circuit or plurality of circuits according to the configuration information item supplied from outside of the semiconductor device, and performs processing using a reconfigured circuit on input data, and outputs obtained output data. ### Claim 14 (depends on 8) The semiconductor device according to claim 8, wherein the processor activates a process completion signal including switching a level of the process completion signal when the process is completed and activates a failure detection signal by switching a level of the failure detection signal when a failure is detected. ### Claim 15 (depends on 8) The semiconductor device according to claim 8, wherein a result of processing by the first processing circuit is determined according to results of processing by the plurality of respective first processing circuits. ### Claim 16 A semiconductor device comprising: a configuration information storage memory that stores a plurality of configuration information items; a state transition management unit that selects any one of the plurality of configuration information items; and a data path unit that dynamically reconfigures a circuit according to the configuration information item selected by the state transition management unit, wherein when a failure is detected in any one of a plurality of logic circuits provided in the data path unit, a plurality of first processing circuits are configured using some or all of the plurality of logic circuits, and a final result of processing by the first processing circuits is determined according to results of processing by the respective plurality of first processing circuits. ### Claim 17 (depends on 16) The semiconductor device according to claim 16, when a failure is not detected in any one of the plurality of logic circuits provided in the data path unit, the first processing circuit is configured using some of the plurality of logic circuits provided in the data path unit that performs predetermined processing on input data Din, a result of processing by the first processing circuit is output outside the data path unit, and a selection of the result of processing by the first processing circuit is made for output. ### Claim 18 (depends on 16) The semiconductor device according to claim 16, wherein when a failure is detected in any one of the plurality of logic circuits provided in the data path unit, the configuration information item stored in a storage region at an address is read out from the configuration information storage memory and then supplied to the data path unit. ### Claim 19 (depends on 18) The semiconductor device according to claim 18, wherein at least three first processing circuits having the a configuration are configured by some or all of the plurality of logic circuits provided in the data path unit. ### Claim 20 (depends on 16) The semiconductor device according to claim 16, when a failure is detected in any one of the plurality of logic circuits provided in the data path unit, at least three first processing circuits having a same configuration are configured using some or all of the plurality of logic circuits, and the result of the processing of the logical value that accounts for a majority of the results of the processing by the respective first processing circuits is output as the result of the processing by one of the first processing circuit.