# US 2018/0321966 A1 · Efficient detection and respone to spin waits in multi-processor virtual machines > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0321966 A1 - Document ID: US20180321966A1 - Status: Published application - Kind: A1 - Application number: 16/031,816 - Filed: 2018-07-10 - Published: 2018-11-08 - Earliest claimed: 2008-07-30 - Assignees: Microsoft Technology Licensing, LLC - Applicants: Microsoft Technology Licensing, LLC - Inventors: Yau Ning Chin; John Te-Jui Sheu; Arun Kishan; Thomas Fahrig; Rene Antonio Vega - Web page: https://patentgrep.com/patent/US20180321966A1 ## CPC - G06F 9/45558: {Hypervisor-specific management and integration aspects} - G06F 9/45533: {Hypervisors; Virtual machine monitors} - G06F 9/526: {Mutual exclusion algorithms} - G06F 2009/4557: {Distribution of virtual machine instances; Migration and load balancing} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Various aspects are disclosed herein for attenuating spin waiting in a virtual machine environment comprising a plurality of virtual machines and virtual processors. Selected virtual processors can be given time slice extensions in order to prevent such virtual processors from becoming de-scheduled (and hence causing other virtual processors to have to spin wait). Selected virtual processors can also be expressly scheduled so that they can be given higher priority to resources, resulting in reduced spin waits for other virtual processors waiting on such selected virtual processors. Finally, various spin wait detection techniques can be incorporated into the time slice extension and express scheduling mechanisms, in order to identify potential and existing spin waiting scenarios. ## Claims ### Claim 1 A method employed by a scheduler for attenuating spin waiting of virtual processors in a virtual machine environment, comprising: examining a hint source for hints to determine if a virtual processor is accessing a synchronizing section that acquires a lock on an underlying physical resource that causes any other virtual processors to spin wait until the virtual processor releases the lock; providing a time slice extension to the virtual processor to increase the time allotted in its assigned time slice if the virtual processor is accessing the synchronizing section; and ending the time slice extension prematurely. ### Claim 2 (depends on 1) The method of claim 1, wherein ending the time slice extension prematurely includes setting an intercept with said hint source and receiving the intercept from the hint source. ### Claim 3 (depends on 1) The method of claim 1, wherein ending the time slice extension prematurely includes receiving a signal from an enlightened guest operating system indicating that the synchronizing section has been cleared. ### Claim 4 (depends on 1) The method of claim 1, wherein the hint source is at least one of a task priority register, an unenlightened guest operating system that is inspected, and an enlightened operating system. ### Claim 5 (depends on 1) The method of claim 1, wherein the scheduler resides in a virtualizing layer configured to provide the time slice extension to the virtual processor. ### Claim 6 (depends on 1) The method of claim 1, further comprising limiting the time slice extension to a predetermined period of time. ### Claim 7 (depends on 1) The method of claim 1, further comprising limiting the number of time slice extensions provided to a predetermined number. ### Claim 8 (depends on 1) The method of claim 1, further comprising debiting the time slice extension provided to the virtual processor such that the virtual processor has less allocated time in a subsequent time slice. ### Claim 9 (depends on 1) The method of claim 1, wherein the lock is at least one of a spinlock, a queued spinlock, a reader/writer lock, and a barrier; and wherein the synchronizing section comprises a region of code that determines access to resources by virtual processors. ### Claim 10 A system for attenuating spin waiting of virtual processors in a virtual machine environment, comprising: a processor; and a memory communicatively coupled to the processor and storing instructions that upon execution by the processor cause the system to: examine a hint source for hints to determine if a virtual processor is accessing a synchronizing section that acquires a lock on an underlying physical resource that causes any other virtual processors to spin wait until the virtual processor releases the lock; provide a time slice extension to the virtual processor to increase the time allotted in its assigned time slice if the virtual processor is accessing the synchronizing section; and end the time slice extension prematurely. ### Claim 11 (depends on 10) The system of claim 10, wherein the instructions for ending the time slice extension prematurely include instructions for setting an intercept with said hint source and receiving the intercept from the hint source. ### Claim 12 (depends on 10) The system of claim 10, wherein the instructions for ending the time slice extension prematurely include instructions for receiving a signal from an enlightened guest operating system indicating that the synchronizing section has been cleared. ### Claim 13 (depends on 10) The system of claim 10, wherein the hint source is at least one of a task priority register, an unenlightened guest operating system that is inspected, and an enlightened operating system. ### Claim 14 (depends on 10) The system of claim 10, wherein the scheduler resides in a virtualizing layer configured to provide the time slice extension to the virtual processor. ### Claim 15 (depends on 10) The system of claim 10, further comprising instructions for limiting the time slice extension to a predetermined period of time. ### Claim 16 (depends on 10) The system of claim 10, further comprising instructions for limiting the number of time slice extensions provided to a predetermined number. ### Claim 17 (depends on 10) The system of claim 10, further comprising instructions for debiting the time slice extension provided to the virtual processor such that the virtual processor has less allocated time in a subsequent time slice. ### Claim 18 (depends on 10) The system of claim 10, wherein the lock is at least one of a spinlock, a queued spinlock, a reader/writer lock, and a barrier; and wherein the synchronizing section comprises a region of code that determines access to resources by virtual processors. ### Claim 19 A computer readable medium comprising machine readable instructions that, upon execution, cause the machine to: examine a hint source for hints to determine if a virtual processor is accessing a synchronizing section that acquires a lock on an underlying physical resource that causes any other virtual processors to spin wait until the virtual processor releases the lock; provide a time slice extension to the virtual processor to increase the time allotted in its assigned time slice if the virtual processor is accessing the synchronizing section; and end the time slice extension prematurely; wherein the instructions for ending the time slice extension prematurely include at least one of: (a) instructions for setting an intercept with said hint source and receiving the intercept from the hint source; and (b) instructions for receiving a signal from an enlightened guest operating system indicating that the synchronizing section has been cleared. ### Claim 20 (depends on 19) The computer readable medium of claim 19, further comprising instructions for limiting the time slice extension to a predetermined period of time; instructions for limiting the number of time slice extensions provided to a predetermined number; and instructions for debiting the time slice extension provided to the virtual processor such that the virtual processor has less allocated time in a subsequent time slice.