# US 2018/0321945 A1 · System and method for processing and arbitrating submission and completion queues

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- Number: US 2018/0321945 A1
- Document ID: US20180321945A1
- Status: Published application
- Kind: A1
- Application number: 15/585,753
- Filed: 2017-05-03
- Published: 2018-11-08
- Earliest claimed: 2017-05-03
- Assignees: Western Digital Technologies, Inc.
- Applicants: Western Digital Technologies, Inc.
- Inventors: Shay Benisty
- Web page: https://patentgrep.com/patent/US20180321945A1

## CPC

- G06F 3/061: {Improving I/O performance}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 13/00: Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (interface circuits for specific input/output devices G06F3/00 {; multiprogram control therefor G06F9/46}; multiprocessor systems G06F15/16 )
- G06F 13/1626: {by reordering requests}
- G06F 13/18: based on priority control (G06F13/1605 takes precedence)
- G06F 13/385: {for adaptation of a particular data processing system to different peripheral devices}
- G06F 15/76: Architectures of general purpose stored program computers (with program plugboard G06F15/08; multicomputers G06F15/16)
- H04L 49/90: Buffering arrangements
- G06F 15/17: using an input/output type connection, e.g. channel, I/O port
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

Systems and methods for processing and arbitrating submission and completion queues are disclosed. NVM Express (NVMe) implements a paired submission queue and completion queue mechanism, with host software on the host device placing commands into the submission queue. The memory device processes the commands through various phases including fetching, processing, posting a completion message, and sending an interrupt to the host. The memory device may process the commands based on the determined priority of the command. For example, the memory device may determine a priority for performing the phases after fetching the command. As another example, the memory device may perform the internal command selection based on a priority associated with the command. In this way, commands may be executed based on the priority needs of the memory device or of the host device.

## Claims

### Claim 1

A method for a memory device to process one or more commands, the method comprising:
fetching commands from one or more submission queues, a host device causing the commands to be stored in the one or more submission queues;
determining phases of processing for the commands;
determining a priority of the commands based on the determined phases of processing; and
processing the commands based on the determined priority.

### Claim 2 (depends on 1)

The method of claim 1, wherein:
a phase of processing for a command comprises execution of the command, updating a completion queue indicative of completion of the command, and interrupting the host device indicative of updating the completion queue; and
priority is higher for updating the completion queue and for interrupting the host device than for execution of the command.

### Claim 3 (depends on 1)

The method of claim 1, wherein the priority of the commands is predetermined and static based on a respective phase of processing for a respective command.

### Claim 4 (depends on 1)

The method of claim 1, wherein the priority of the commands is determined dynamically based on an analysis of current phases of the commands subject to processing.

### Claim 5 (depends on 1)

The method of claim 1, wherein:
the commands include read requests to the host device corresponding to actions in different phases of processing the commands; and
an order of performing the actions is determined based on priority of the read requests to the host device.

### Claim 6 (depends on 5)

The method of claim 5, wherein:
a first read request comprises data fetching to perform the action of fetching data from the host device;
a second read request comprises command fetching to perform the action of fetching the command from the host device; and
the first read request is assigned a higher priority than the second read request.

### Claim 7 (depends on 1)

The method of claim 1, wherein:
the commands include write requests to the host device corresponding to actions in different phases of processing the commands; and
an order of performing the actions is determined based on priority of the write requests to the host device.

### Claim 8 (depends on 7)

The method of claim 7, wherein:
a first write request comprises interrupt posting to perform the action of generating an interrupt to the host device;
a second write request comprises data writing to perform the action of writing data to the host device, wherein the data was read from non-volatile memory in the memory device; and
the first write request is assigned a higher priority than the second write request.

### Claim 9 (depends on 1)

The method of claim 1, wherein determining the priority of the commands based on the determined phases of processing comprises:
determining respective numbers of commands in respective phases of processing;
comparing the respective numbers of commands in the respective phases of processing with predetermined respective numbers assigned to the respective phases; and
prioritizing processing of the commands based on the comparison.

### Claim 10

A non-volatile memory device comprising:
a non-volatile memory having a plurality of memory cells;
a communication interface configured to communicate with a host device; and
a controller in communication with the non-volatile memory and the communication interface, the controller configured to:
communicate with the host device regarding commands from one or more submission queues;
determine phases of processing for the commands;
determine a priority of the commands based on the determined phases of processing; and
process the commands based on the determined priority.

### Claim 11 (depends on 10)

The non-volatile memory device of claim 10, wherein:
a phase of processing for a command comprises execution of the command, updating a completion queue indicative of completion of the command, and interrupting the host device indicative of updating the completion queue; and
the controller is further configured to update the completion queue and to interrupt the host device with a higher priority than execution of the command.

### Claim 12 (depends on 10)

The non-volatile memory device of claim 10, wherein the controller is further configured to:
analyze current phases of the commands subject to processing; and
determine the priority of the commands based on the analysis.

### Claim 13

A method for a memory device to process one or more commands, the method comprising:
communicating, with a host device via a communication interface, regarding commands in one or more submission queues, the host device causing the commands to be stored in the one or more submission queues;
determining, in processing the commands, a need for the communication interface;
determining, based on the need for the communication interface, a priority in processing the commands; and
processing the commands based on the determined priority.

### Claim 14 (depends on 13)

The method of claim 13, wherein:
the communication interface comprises an ingress path and an egress path;
determining the need for the communication interface comprises determining the need for the egress path; and
determining the priority in processing the commands is based on the determined need for the egress path.

### Claim 15 (depends on 13)

The method of claim 13, wherein:
the communication interface comprises an ingress path and an egress path;
determining the need for the communication interface comprises determining the need for the ingress path; and
determining the priority in processing the commands is based on the determined need for the ingress path.

### Claim 16 (depends on 13)

The method of claim 13, further comprising determining busyness of the communication interface;
wherein determining the priority in processing the commands is based on the need for the communication interface and based on the busyness of the communication interface.

### Claim 17 (depends on 16)

The method of claim 16, wherein:
the communication interface comprises an ingress path and an egress path; and
responsive to determining that the busyness of the ingress path exceeds a predetermined amount, determining a lower priority of commands that prompt the host device to send a communication via the ingress path.

### Claim 18 (depends on 16)

The method of claim 16, wherein:
the communication interface comprises an ingress path and an egress path; and
responsive to determining that the busyness of the egress path exceeds a predetermined amount, determining a lower priority of commands that send communications via the egress path.

### Claim 19

A non-volatile memory device comprising:
a non-volatile memory having a plurality of memory cells;
a communication interface configured to communicate with a host device; and
a controller in communication with the non-volatile memory and the communication interface, the controller configured to:
communicate with the host device regarding commands from one or more submission queues;
determine busyness of the communication interface;
determine a priority of the commands based on the busyness of the communication interface; and
process the commands based on the determined priority.

### Claim 20 (depends on 19)

The non-volatile memory device of claim 19, wherein:
the communication interface comprises an ingress path and an egress path; and
responsive to the controller determining that the busyness of the ingress path exceeds a predetermined amount, the controller is further configured to determine a lower priority for commands that prompt the host device to send a communication via the ingress path.