# US 2018/0321871 A1 · Apparatuses and methods for partitioned parallel data movement

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- Number: US 2018/0321871 A1
- Document ID: US20180321871A1
- Status: Published application
- Kind: A1
- Application number: 16/033,471
- Filed: 2018-07-12
- Published: 2018-11-08
- Earliest claimed: 2016-02-10
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Jeremiah J. Willcock; David L. Pinney
- Web page: https://patentgrep.com/patent/US20180321871A1

## CPC

- G06F 3/0647: {Migration mechanisms}
- G06F 3/0604: {Improving or facilitating administration, e.g. storage management}
- G06F 3/0644: {Management of space entities, e.g. partitions, extents, pools}
- G06F 3/0646: {Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems}
- G06F 3/0673: {Single storage device}
- G06F 15/7821: {Tightly coupled to memory, e.g. computational memory, smart memory, processor in memory}
- G11C 7/1006: {Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor}
- G11C 7/1048: {Data bus control circuits, e.g. precharging, presetting, equalising}
- G11C 11/4091: Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
- G11C 11/4093: Input/output [I/O] data interface arrangements, e.g. data buffers
- G11C 2207/2236: Copy
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

The present disclosure includes apparatuses and methods for partitioned parallel data movement. An example apparatus includes a memory device that includes a plurality of partitions, where each partition of the plurality of partitions includes a subset of a plurality of subarrays of memory cells. The memory device also includes sensing circuitry coupled to the plurality of sub arrays, the sensing circuitry including a sense amplifier. A controller for the memory device is configured to direct a first data movement within a first partition of the plurality of partitions in parallel with a second data movement within a second partition of the plurality of partitions.

## Claims

### Claim at position 1

1-21. (canceled)

### Claim 21

An apparatus, comprising:
a memory device, comprising:
a plurality of partitions, wherein each partition of the plurality of partitions includes a subset of a plurality of subarrays of memory cells;
a shared input/output (I/O) line shared by the plurality of partitions; and
a controller configured to:
selectably couple the shared I/O line to sensing circuitry selectably coupled to a subset of a larger total number of columns of memory cells to move corresponding data values stored by the sensing circuitry to the shared I/O line; and
direct a first data movement within a first partition of the plurality of partitions in parallel with a second data movement within a second partition of the plurality of partitions.

### Claim 22 (depends on 21)

The apparatus of claim 21, wherein the sensing circuitry further comprises a sense amplifier.

### Claim 23 (depends on 21)

The apparatus of claim 21, wherein the memory device further comprises:
isolation circuitry configured to selectably disconnect at least a portion of the first partition from at least a portion of the second partition; and
wherein the controller is further configured to direct the isolation circuitry to disconnect the at least the portions of the first and second partitions during the parallel first and second movements.

### Claim 24 (depends on 21)

The apparatus of claim 21, wherein the memory device further comprises isolation circuitry configured to selectably disconnect at least a portion of the first partition from at least a portion of the second partition by selectable disconnection of portions of an I/O line shared by the first and second partitions.

### Claim 25 (depends on 21)

The apparatus of claim 21, wherein the controller is further configured to:
direct sensing circuitry coupled to a first subarray and sensing circuitry coupled to a second subarray in the first partition to couple to a first portion of an I/O line shared by the first and second subarrays in the first partition;
direct sensing circuitry coupled to a third subarray and sensing circuitry coupled to a fourth subarray in the second partition to couple to a second portion of the I/O line shared by the first and second subarrays in the second partition; and
direct a parallel movement of a plurality of data values from the first subarray to the second subarray in the first partition and from the third subarray to the fourth subarray in the second partition.

### Claim 26 (depends on 21)

The apparatus of claim 21, wherein:
each subarray of the plurality of subarrays includes a same number of a plurality of rows of memory cells; and
each partition of the plurality of partitions includes a same number of the plurality of the subarrays.

### Claim 27

A system, comprising:
a host;
a memory device configured to receive a command from the host for movement of data, the memory device, comprising:
a plurality of partitions, wherein each partition of the plurality of partitions includes a subset of a plurality of subarrays; and
a shared I/O line shared by the plurality of partitions, the shared I/O line comprising a plurality of portions; and
the memory device configured to selectably direct isolation circuitry to:
connect a first portion of the plurality of portions of the shared I/O line to a second portion of the shared I/O line, wherein the first portion corresponds to a first partition of the plurality of partitions and the second portion corresponds to a second partition of the plurality of partitions;
connect a third portion of the shared I/O line corresponding to a third partition to a fourth portion of the shared I/O line corresponding to a fourth partition during a data movement, wherein the data movement is from the third partition to the fourth partition; and
disconnect the second portion of the shared I/O line from the third portion of the shared I/O line during the data movement.

### Claim 28 (depends on 27)

The system of claim 27, wherein the memory device is further configured to selectably direct the isolation circuitry to:
disconnect the first portion of the shared I/O line from the second portion of the shared I/O line during parallel first and second data movements, wherein the first data movement is within the first partition and the second data movement is within the second partition; and
connect the first portion to the second portion during a third data movement, wherein the third data movement is from the first partition to the second partition.

### Claim 29 (depends on 28)

The system of claim 28, wherein the memory device is further configured to selectably direct the isolation circuitry to:
connect the third portion of the shared I/O line to the fourth portion of the shared I/O line during a fourth data movement, wherein the fourth data movement is the data movement from the third partition to the fourth partition; and
disconnect the second portion of the shared I/O line from the third portion of the shared I/O line during the fourth data movement, wherein the third and fourth data movements are parallel data movements.

### Claim 30 (depends on 27)

The system of claim 27, wherein the memory device further comprises:
a sensing component stripe configured to include a number of a plurality of sense amplifiers that corresponds to a number of a plurality of columns of the memory cells; and
wherein the number of sense amplifiers in the sensing component stripe is selectably coupled to the shared I/O line.

### Claim 31 (depends on 27)

The system of claim 27, wherein the memory device further comprises column select circuitry to select a particular column of memory cells of a subarray by coupling at least one of a sense amplifier and a compute component coupled to a respective sense line to selectably sense data in the particular column of memory.

### Claim 32

A method for operating a memory device, comprising:
receiving a command, by the memory device, for parallel movement of data, the memory device comprising:
a plurality of partitions, wherein each partition of the plurality of partitions includes a subset of a plurality of subarrays; and
a shared I/O line shared by the plurality of partitions, the shared I/O line comprising a plurality of portions; and
disconnecting a first portion of the shared I/O line from a second portion of the shared I/O line;
moving data within a first partition via the first portion of the shared I/O line disconnected from the second portion;
in parallel with moving data within the first partition, moving data within a second partition via the second portion of the shared I/O line;
connecting the first portion of the shared I/O line to the second portion of the shared I/O line;
moving data from the first partition to the second partition via a connected shared I/O line;
disconnecting the second portion of the shared I/O line from a third portion of the shared I/O line;
connecting the third portion of the shared I/O line to a fourth portion of the shared I/O line; and
in parallel with moving the data from the first partition to the second partition, moving data from a third partition to a fourth partition.

### Claim 33 (depends on 32)

The method of claim 32, wherein the method further comprises:
connecting the second portion of the shared I/O line to the third portion of the shared I/O line; and
moving data from the second partition to the third partition.

### Claim 34 (depends on 32)

The method of claim 32, wherein the method further comprises:
connecting together the first, second, third, and fourth portions of the shared I/O line; and
moving data from the second partition to the third partition.

### Claim 35 (depends on 32)

The method of claim 32, wherein the method further comprises:
coupling a first isolation transistor the first portion of the shared I/O line to selectably control data movement from the first partition to the second partition; and
coupling a second isolation transistor to the second portion of the shared I/O line to selectably control data movement from the second partition to the first partition.

### Claim 36 (depends on 32)

The method of claim 32, wherein the method further comprises:
disconnecting the first and second partitions by inactivation of an isolation transistor coupled to the shared I/O line between the first and second partitions to; and
forming, by the disconnect, the first portion and the second portion of the shared I/O line.

### Claim 37 (depends on 32)

The method of claim 32, wherein the method further comprises disconnecting the first and second partitions to isolate a first data movement from a first subarray to a second subarray in the first partition from a parallel second data movement from a third subarray to a fourth subarray in the second partition.

### Claim 38 (depends on 37)

The method of claim 37, wherein the method further comprises:
moving first data values stored in a number of rows of each of a number of subarrays in the first data movement;
moving the first data values to a corresponding number of rows in a respective number of adjacent subarrays;
moving second data values stored in a number of rows of each of a number of subarrays in the second data movement; and
moving the second data values to a corresponding number of rows in a respective number of adjacent subarrays.

### Claim 39 (depends on 32)

The method of claim 32, wherein the method further comprises:
connecting the first and second partitions via activation of an isolation transistor coupled to the shared I/O line between the first and second partitions; and
moving data from a last subarray of the first partition to a first subarray in the second partition.

### Claim 40 (depends on 32)

The method of claim 32, wherein the method further comprises:
storing data values from a number of rows of a last subarray of the first partition in a storage space prior to being overwritten by data values from a number of rows in a next-to-last subarray of the first partition; and
moving the data values from the storage space to a corresponding number of rows in a first subarray of the second partition.