Phase calibration method and associated phase locked loop circuit

A phase locked loop (PLL) circuit for a wireless communication system, comprising:

• a phase error estimating module, calculating a header phase error of a header sub-frame of a frame in an input signal and a pilot phase error of a pilot sub-frame of the frame, wherein the header sub-frame and the pilot sub-frame are known data;
• a phase error adjusting module, generating an estimated phase error according to a relationship between the header phase error and the pilot phase error;
• an oscillator, generating a phase compensating signal according to the estimated phase error and a filtered signal;
• a multiplying unit, adjusting the input signal according to the phase compensating signal to generate a compensated input signal;
• a phase error detecting unit, detecting a phase error between a data sub-frame corresponding to the pilot sub-frame in the compensated input signal and a reference signal;
• and
• a filter, generating the filtered signal according to the phase error.