Buffer circuit

A buffer circuit, operating at a working voltage received by its input end, wherein the working voltage is controlled within a voltage range, the buffer circuit comprising:

• a high voltage constant current buffer circuit, comprising:
• a first PMOS transistor and a first NMOS transistor, the source of the first NMOS transistor being grounded, and the drain of the first PMOS transistor connecting to the drain of the first NMOS transistor;
• a second PMOS transistor, the source of the second PMOS transistor connecting to the supply voltage of the high voltage constant current buffer circuit, and the drain of the second PMOS transistor connecting to the source of the first PMOS transistor;
• and
• a high voltage diode connected composite transistors, an input end of the high voltage diode connected composite transistors connecting to the supply voltage of the high voltage constant current buffer circuit, an output end of the high voltage diode connected composite transistors connecting to the gate of the first PMOS transistor and the gate of the second PMOS transistor;
• wherein the second PMOS transistor in the high voltage constant current buffer circuit is a low-voltage PMOS transistor, the first PMOS transistor in the high voltage constant current buffer circuit is a high-voltage PMOS transistor, and the first NMOS transistor in the high voltage constant current buffer circuit is a high-voltage NMOS transistor, to reduce the variation of an output current of the buffer circuit resulting from changes of the supply voltage.