Delay line circuit and method of operating the same

A method of operating a delay line circuit, the method comprising:

• coarsely-tuning an input signal, the coarsely-tuning including:
• transferring the input signal through a selected number of first delay units and thereby producing a first output signal;
• and
• finely-tuning the first output signal and thereby producing a second output signal, the finely-tuning including:
• transferring the first output signal through second delay units, which represent a first phase unit configured to provide a first phase output having a first phase;
• passing the transferring the first output signal through first and second delay paths resulting in a first phase intermediate signal having a first phase and second phase intermediate signal having a second phase;
• selectively connecting a speed control unit to the second path based on a process-corner signal;
• and
• combining the first phase intermediate signal and the second phase intermediate signal to form the second output signal, the second output signal the having a third phase ranging from the first phase to the second phase.

A delay line circuit comprising:

• a coarse-tuning arrangement, including first delay units, the coarse-tuning arrangement being configured to coarsely-tune an input signal by transferring the input signal through a selected number of the first delay units and thereby producing a first output signal;
• and
• a fine-tuning arrangement configured to:
• receive the first output signal at a beginning of a signal path which includes second delay units;
• finely-tune the first output signal along the signal path;
• and
• produce a second output signal at an end of the signal path;
• the fine-tuning arrangement including:
• a speed control unit which is selectively-connectable;
• and
• a switching circuit to selectively connect the speed control unit to the signal path based on a process-corner signal which is indicative of which one among a PMOS transistor and a corresponding NMOS transistor has a higher current capacity;
• and
• a process-sensing circuit configured to generate the process-corner signal.