Array substrates, display devices, and the manufacturing methods thereof
AssigneeShenzhen China Star Optoelectronics Technology Co., Ltd.
InventorXingyu ZHOU
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Abstract
The present disclosure relates to an array substrate, a display device, and the manufacturing method thereof. The array substrate includes a substrate, and a first gate electrode layer, a first insulation layer, a trench layer, a source/drain electrode layer, a second insulation layer, a pixel electrode layer and a second gate electrode layer formed on the substrate in sequence. The pixel electrode layer and the second gate electrode layer are spaced apart from each other. The second gate electrode layer, the first gate electrode layer, and the source/drain electrode layer form at least one thin film transistor (TFT) having a dual-gate structure. With such configuration, the driving forces of the array substrate may be greatly enhanced.
Claims16
A display device, comprising:
- an array substrate comprising:
- a substrate, and a first gate electrode layer, a first insulation layer, a trench layer, a source/drain electrode layer, a second insulation layer, a pixel electrode layer and a second gate electrode layer formed on the substrate in sequence, and the pixel electrode layer and the second gate electrode layer being spaced apart from each other;
- wherein the second gate electrode layer, the first gate electrode layer, and the source/drain electrode layer form at least one thin film transistor (TFT) having a dual-gate structure;
- the second gate electrode layer connecting to the first gate electrode layer via through holes of the first insulation layer and the second insulation layer;
- the trench layer comprising a semiconductor layer and a P-type silicon-doped layer.
An array substrate, comprising:
- a substrate;
- a first gate electrode layer covered the substrate;
- a first insulation layer covered the first gate electrode layer;
- a trench layer formed on the first insulation layer;
- a source/drain electrode layer formed on the trench layer;
- a second insulation layer covered the first insulation layer, the source/drain electrode layer and the trench layer;
- a pixel electrode layer and the second gate electrode layer being configured to be spaced apart from each other on the second insulation layer;
- wherein the second gate electrode layer, the first gate electrode layer, and the source/drain electrode layer form at least one thin film transistor (TFT) having a dual-gate structure.
A manufacturing method of array substrates, comprising:
- forming a first gate electrode layer and a first insulation layer on a substrate in sequence;
- forming a trench layer on the first insulation layer;
- forming a source/drain electrode layer and a second insulation layer on the trench layer in sequence;
- forming a pixel electrode layer and a second gate electrode layer on the second insulation layer, the pixel electrode layer and the second gate electrode layer are spaced apart from each other, wherein the second gate electrode layer, the first gate electrode layer, and the source/drain electrode layer form at least one thin film transistor (TFT) having the dual-gate structure.
Dependencies are inferred from the claim text.