Apparatuses Containing FinFETS

An apparatus comprising:

• a plurality of finFETs, wherein each of the finFETs comprises a first pedestal serving as a first source/drain region, a second pedestal serving as a second source/drain region and a trough defining a channel region between the first and second source/drain region;
• at least one bitline, wherein the at least one bitline extends to interconnect the first source/drain region of the plurality of finFETs to each other, wherein the at least one bitline comprises a plurality of first portions and a plurality of second portions, wherein each of the plurality of first portions is in contact with an associated one of the first source/drain region of the plurality of finFETs, wherein each of the plurality of second portions intervenes between corresponding adjacent two of the plurality of first portions, and wherein each the plurality of second portions comprises a first conductive material;
• a plurality of storage devices;
• and
• a plurality of contact plugs, wherein each of the plurality of contact plugs intervenes between an associated one of the plurality of storage devices and an associated one of the second source/drain region of the plurality of finFETs, wherein the each of the contact plugs comprises the first conductive material that is used in each of the plurality of second portions of the at least one bitline.

An apparatus comprising:

• a conductive wordline extending along a first direction;
• a rail of semiconductor material extending along the conductive wordline;
• fins defined in the rail of semiconductor material, each fin having a first pedestal, a second pedestal, and a trough between the first and second pedestals;
• digit lines electrically coupled with the second pedestals;
• charge-storage devices electrically coupled with the first pedestals;
• and
• a conductive beam extending beneath the conductive wordline.