Power Semiconductor Device and Package

A power semiconductor device and package, comprising:

• a first semiconductor pair of devices configured between a first and a second source region and configured to share a drain region wherein a source portion of the first pair of devices is laterally adjacent a drain portion of a second pair of devices,
• wherein the first pair of devices is laid out laterally diagonal from the second pair of devices to distribute thermal conductivity relative to an input and an output of the device package;
• and
• a plurality of stair case patterned lateral isolation trenches in a substrate of the package, the trenches configured to isolate the laterally diagonal source regions from a common drain region of the first and the second semiconductor pair of devices.

A power semiconductor device and package system, comprising:

• a first semiconductor pair of devices configured between a first and a second source region and configured to share a drain region laterally adjacent to a source portion of a second pair of devices,
• wherein the first pair of devices is laid out in a staggered pattern from the second pair of devices to distribute thermal conductivity relative to an input and an output of the device package;
• and
• a plurality of stair case patterned lateral isolation trenches in a substrate of the package, the trenches configured to isolate a staggered source region from a common drain region of the first and the second semiconductor pair of devices.