Multi-layer work function metal gates with similar gate thickness to achieve multi-vt for vfets
AssigneeInternational Business Machines Corporation
InventorsRuqiang Bao, Hemanth Jagannathan, Paul C. Jamison, ChoongHyun Lee
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Abstract
A method is presented for forming a device having multiple field effect transistors (FETs) with each FET having a different work function. In particular, the method includes forming multiple microchips in which each FET has a different threshold voltage (Vt) or work-function. In one embodiment, four FETs are formed over a semiconductor substrate. Each FET has a source, drain and a gate electrode. Each gate electrode is processed independently to provide a substantially different threshold voltage.
Claims20
A method for forming a device having multiple field effect transistors (FETs) with each FET having a different work function gate stack, the method comprising:
- forming a first FET, a second FET, a third FET, and a fourth FET over a semiconductor substrate;
- forming a first work function conducting layer shared between the first, second, third, and fourth FETs;
- forming a second work function conducting layer shared between the second, third, and fourth FETs;
- forming a third work function conducting layer shared between the third and fourth FETs;
- forming a fourth work function conducting layer over the fourth FET;
- and
- forming at least one metal layer over the first, second, third, and fourth FETs such that a distance between the at least one metal layer and the first FET is substantially equal to a distance between the at least one metal layer and the third FET.
A method for forming a device having multiple field effect transistors (FETs) with each FET having a different work function gate stack, the method comprising:
- forming a first FET, a second FET, a third FET, and a fourth FET over a semiconductor substrate;
- forming a first work function conducting layer shared between the first, second, third, and fourth FETs;
- forming a second work function conducting layer shared between the second, third, and fourth FETs;
- forming a third work function conducting layer shared between the third and fourth FETs;
- forming a fourth work function conducting layer over the fourth FET;
- and
- forming at least one metal layer over the first, second, third, and fourth FETs such that a thickness difference between gate stacks of the first, second, third, and fourth FETs is less than about 2 nm.
Dependencies are inferred from the claim text.