Lifetime mixed level non-volatile memory system
AssigneeGreenthread, LLC
InventorG.R. MOHAN RAO
Life of this patent
Estimating the term…
Abstract
A flash controller for managing at least one MLC non-volatile memory module and at least one SLC non-volatile memory module. The flash controller is adapted to determine if a range of addresses listed by an entry and mapped to said at least one MLC non-volatile memory module fails a data integrity test. In the event of such a failure, the controller remaps said entry to an equivalent range of addresses of said at least one SLC non-volatile memory module. The flash controller is further adapted to determine which of the blocks in the MLC and SLC non-volatile memory modules are accessed most frequently and allocating those blocks that receive frequent writes to the SLC non-volatile memory module and those blocks that receive infrequent writes to the MLC non-volatile memory module.
Claims9
A system for storing data comprising:
- memory space containing volatile memory space and nonvolatile memory space, wherein the nonvolatile memory space includes both multilevel cell (MLC) space and single level cell (SLC) space;
- at least one controller to operate memory elements and associated memory space;
- at least one MLC nonvolatile memory element;
- at least one SLC nonvolatile memory element;
- at least one random access volatile memory element;
- an FTL flash translation layer, wherein the at least one controller, or FTL, or a combination of both maintain an address table in one or more of the memory elements;
- and
- wherein the address table maps logical and physical addresses adaptable to the system, wherein the mapping is performed as necessitated by the system to maximize lifetime, and wherein the mapping maps blocks, pages, or bytes of data in either volatile or nonvolatile, or both, memories.
The system of claim 1, wherein the volatile memory is dynamic random access memory.
Dependencies are inferred from the claim text.