# US 2018/0293928 A1 · Driving circuit and liquid crystal display device thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0293928 A1 - Document ID: US20180293928A1 - Status: Published application - Kind: A1 - Application number: 15/522,245 - Filed: 2017-03-17 - Published: 2018-10-11 - Earliest claimed: 2017-02-28 - Assignees: Shenzhen China Star Optoelectronics Technology Co., Ltd. - Applicants: Shenzhen China Star Optoelectronics Technology Co., Ltd. - Inventors: Yuyeh CHEN; Jhenwei HE; Yu WU; Tao HE - Web page: https://patentgrep.com/patent/US20180293928A1 ## CPC - G09G 3/2007: {Display of intermediate tones} - G09G 3/3611: {Control of matrices with row and column drivers} - G09G 3/3674: {Details of drivers for scan electrodes} - G09G 3/3685: {Details of drivers for data electrodes} - G09G 3/3696: {Generation of voltages supplied to electrode drivers} - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/0276: for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction - G09G 2320/0666: for control of colour parameters, e.g. colour temperature - G09G 2320/0673: for control of gamma adjustment, e.g. selecting another gamma curve - G09G 2330/021: Power management, e.g. power saving - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A driving circuit and a liquid crystal display device hereof are described. The driving circuit includes a source driving chip to convert the video signal into a plurality of gray scale voltages. A relationship between the brightness and the gray scales of the display panel and a relationship between the brightness and the voltages of the display panel in a predetermined gamma curve are pre-acquired. The source driving chip obtains a string of resistance values based on a relationship between the brightness and the gray scales and a relationship between the brightness and the voltages. The data signal is then generated according to the data control voltage, the first timing control signal, the video signal and the string of resistance values. ## Claims ### Claim 1 A driving circuit comprising: a power management chip, configured to generate data control voltages and scanning control voltages; a timing control chip, configured to provide a first timing control signal, a video signal, and a second timing control signal, and to provide a white balance adjustment table for adjusting a data signal according to the white balance adjustment table to optimize a gamma curve; a source driving chip, configured to convert the video signal into a plurality of gray scale voltages and to pre-acquire a relationship between a brightness and gray scales of a display panel and a relationship between the brightness and voltages of the display panel in a predetermined gamma curve, wherein the source driving chip obtains a string of resistance values based on a relationship between the brightness and the gray scales and a relationship between the brightness and the voltages, and the data signal is generated according to the data control voltages, the first timing control signal, the video signal and the string of resistance values so that a display effect of the display panel meets a predetennined requirement; and a gate driving chip, configured to generate a scanning signal according to the scanning control voltages and the second timing control signal. ### Claim 2 (depends on 1) The driving circuit of claim 1, wherein the source driving chip acquires a relationship between the gray scales and the voltages after a voltage division is generated based on a relationship between the brightness and the gray scales and based on the relationship between the brightness and the voltages, and the source driving chip obtains the string of resistance values based on relationship between the brightness and the gray scales after the voltage division is generated. ### Claim 3 (depends on 1) The driving circuit of claim 1, wherein the power management chip comprises a first output terminal, the timing control chip comprises a second output terminal, the gate driving chip comprises a first input terminal and a second input terminal, the first input terminal connects to the first output terminal, and the second input terminal connects to the second output terminal. ### Claim 4 (depends on 1) The driving circuit of claim 1, wherein the power management chip comprises a first output terminal, the source driving chip comprises a third input terminal and a fourth input terminal, the third input terminal connects to the first output terminal, and the fourth input terminal connects to the second output terminal. ### Claim 5 A driving circuit, comprising: a power management chip, configured to generate data control voltages; a timing control chip, configured to provide a first timing control signal and a video signal; and a source driving chip, configured to convert the video signal into a plurality of gray scale voltages and to pre-acquire a relationship between a brightness and gray scales of a display panel and a relationship between the brightness and voltages of the display panel in a predetermined gamma curve, wherein the source driving chip acquires a relationship between the gray scales and the voltages after a voltage division is generated based on a relationship between the brightness and the gray scales and based on the relationship between the brightness and the voltages, and the source driving chip obtains the string of resistance values based on relationship between the brightness and the gray scales after the voltage division is generated, and wherein the data signal is generated according to the data control voltages, the first timing control signal, the video signal and the string of resistance values so that a display effect of the display panel meets a predetermined requirement. ### Claim 6 (depends on 5) The driving circuit of claim 5, wherein the timing control chip is further configured to provide a white balance adjustment table for adjusting a data signal according to the white balance adjustment table to optimize a gamma curve. ### Claim 7 (depends on 5) The driving circuit of claim 5, wherein the driving further comprises a gate driving chip; wherein the power management chip is further configured to scanning control voltages; wherein the timing control chip is further configured to provide a second timing control signal; wherein the gate driving chip is configured to generate a scanning signal according to the scanning control voltages and the second timing control signal. ### Claim 8 (depends on 7) The driving circuit of claim 7, wherein the power management chip comprises a first output terminal, the timing control chip comprises a second output terminal, the gate driving chip comprises a first input terminal and a second input terminal, the first input terminal connects to the first output terminal, and the second input terminal connects to the second output terminal. ### Claim 9 (depends on 5) The driving circuit of claim 5, wherein the power management chip comprises a first output terminal, the source driving chip comprises a third input terminal and a fourth input terminal, the third input terminal connects to the first output terminal, and the fourth input terminal connects to the second output terminal. ### Claim 10 A liquid crystal display device comprising a liquid crystal display panel and a driving circuit, the driving circuit comprising: a power management chip, configured to generate data control voltages; a timing control chip, configured to provide a first timing control signal and a video signal; and a source driving chip, configured to convert the video signal into a plurality of gray scale voltages and to pre-acquire a relationship between a brightness and gray scales of a display panel and a relationship between the brightness and voltages of the display panel in a predetermined gamma curve, wherein the source driving chip acquires a relationship between the gray scales and the voltages after a voltage division is generated based on a relationship between the brightness and the gray scales and based on the relationship between the brightness and the voltages, and the source driving chip obtains the string of resistance values based on relationship between the brightness and the gray scales after the voltage division is generated, and wherein the data signal is generated according to the data control voltages, the first timing control signal, the video signal and the string of resistance values so that a display effect of the display panel meets a predetermined requirement. ### Claim 11 (depends on 10) The liquid crystal display device of claim 10, wherein the timing control chip is further configured to provide a white balance adjustment table for adjusting a data signal according to the white balance adjustment table to optimize a gamma curve. ### Claim 12 (depends on 10) The liquid crystal display device of claim 10, wherein the driving further comprises a gate driving chip; wherein the power management chip is further configured to scanning control voltages; wherein the timing control chip is further configured to provide a second timing control signal; wherein the gate driving chip is configured to generate a scanning signal according to the scanning control voltages and the second timing control signal. ### Claim 13 (depends on 12) The liquid crystal display device of claim 12, wherein the power management chip comprises a first output terminal, the timing control chip comprises a second output terminal, the gate driving chip comprises a first input terminal and a second input teiininal, the first input terminal connects to the first output terminal, and the second input terminal connects to the second output terminal. ### Claim 14 (depends on 12) The liquid crystal display device of claim 12, wherein the power management chip comprises a first output terminal, the source driving chip comprises a third input terminal and a fourth input terminal, the third input terminal connects to the first output terminal, and the fourth input terminal connects to the second output terminal.