Duty-cycle control for power-level adjustment in switch-mode power amplifiers
AssigneeWaveguide Corporation
InventorAlexander ALEXEYEV
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Abstract
An approach for accurately setting a duty cycle of PA switching waveforms uses an all-digital PVT sensor circuit. In various embodiments, the all-digital PVT sensor circuit measures a pulse width of a periodic reference signal using digital delay line, and subsequently, implements an off-chip digital calculation to program the digital delay line to delay this periodic reference signal so that, when the delayed periodic reference signal is combined with the original (undelayed) reference via a logical AND operation, the resulting signal conforms to a desired duty cycle. In one implementation, the PA is a class-D PA, which may have a single-ended configuration or a differential configuration having two single-ended structures operating in opposite phases.
Claims22
Circuitry for adjusting a duty cycle of an RF carrier input signal to a power amplifier (PA), the circuitry comprising:
- a digital delay line, comprising a plurality of digital delay elements, for receiving the input signal;
- a time-to-digital converter for measuring a number of the digital delay elements required for generating a desired duty cycle;
- and
- circuitry for selecting the number of delay elements of the digital delay line required to generate a desired duty cycle and receiving an output signal therefrom, the output signal having the adjusted duty cycle.
An NMR apparatus comprising:
- an NMR coil configured to enclose a sample;
- an integrated switch-mode PA coupled to the NMR coil;
- and
- circuitry for adjusting a duty cycle of an input signal to a power amplifier (PA);
- wherein the circuitry comprises:
- (i) a digital delay line having a plurality of delay elements, and (ii) a time-to-digital converter for measuring a number of the delay elements required for generating a desired duty cycle.
Dependencies are inferred from the claim text.