Front to back resistive random access memory cells

A resistive random-access memory device formed on a semiconductor substrate and comprising:

• an interlayer dielectric formed over the semiconductor substrate and having a first via formed therethrough;
• a chemical-mechanical-polishing stop layer formed over the interlayer dielectric, the first via formed through the chemical-mechanical-polishing stop layer;
• a lower metal layer formed in the first via, top surfaces of the chemical-mechanical-polishing stop layer, the first barrier metal liner and the lower metal layer forming a substantially planar top surface;
• a dielectric layer formed over the chemical-mechanical-polishing stop layer and in electrical contact with the lower metal layer;
• a barrier metal layer formed over the dielectric layer;
• edges of the dielectric layer and the first barrier metal layer being in substantial alignment with each other to form an aligned stack disposed directly over the lower metallization layer, edges of the aligned stack extending beyond outer edges of the first via;
• a dielectric barrier layer formed over the aligned stack and at least a portion of the chemical-mechanical-polishing stop layer, the dielectric barrier layer including a second via formed therethrough communicating with the barrier metal layer;
• and
• an upper metal layer formed in the second via and in electrical contact with the barrier metal layer.