Transconductance amplifier and phase shifter
AssigneeMitsubishi Electric Corporation
InventorsTakaya MARUYAMA, Eiji TANIGUCHI
Life of this patent
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Abstract
A transconductance amplifier is provided with: a cross-coupled differential pair (31) having one set of differential pair transistors in which signals whose polarities are opposite to each other are inputted to gates thereof, drains of one of the differential pair transistors being connected to drains of another one of the differential pair transistors, and a control circuit (32) comprised of logical circuits, for outputting a binary signal to the common source of each of the differential pair transistors on the basis of an output-level control signal and a polarity control signal which are inputted thereto.
Claims8
A transconductance amplifier comprising:
- a cross-coupled differential pair having one set of differential pair transistors in which signals whose polarities are opposite to each other are inputted to gates thereof, drains of one of the differential pair transistors being connected to drains of another one of the differential pair transistors;
- and
- a control circuit comprised of logical circuits, for outputting binary signals to common sources of the respective differential pair transistors on a basis of an output-level control signal and a polarity control signal which are inputted thereto, the output-level control signal being a binary signal for controlling presence or absence of an output of the cross-coupled differential pair and the polarity control signal being a binary signal for controlling a polarity of the output of the cross-coupled differential pair.
A transconductance amplifier comprising:
- a cross-coupled differential pair having one set of differential pair transistors in which signals whose polarities are opposite to each other are inputted to common sources thereof, drains of one of the differential pair transistors being connected to drains of another one of the differential pair transistors;
- and
- a control circuit comprised of logical circuits, for outputting binary signals to respective gates of the differential pair transistors on a basis of an output-level control signal and a polarity control signal which are inputted thereto, the output-level control signal being a binary signal for controlling presence or absence of an output of the cross-coupled differential pair and the polarity control signal being a binary signal for controlling a polarity of the output of the cross-coupled differential pair.
Dependencies are inferred from the claim text.